Hello,

I m trying to make sense of the following code, what does the register offset mean?

/* register offset */
+#define OFS_RCV_BUFFER (0*REG_OFFSET)
+#define OFS_TRANS_HOLD (0*REG_OFFSET)
+#define OFS_SEND_BUFFER (0*REG_OFFSET)
+#define OFS_INTR_ENABLE (1*REG_OFFSET)

Thanks,
Ashlesha.

Moved: This thread is more suitable in <Programming> and has been moved accordingly to help your thread/question get the exposure it deserves.

That said - I assume it's a macro that makes that piece of code
more machine independent?


Cheers,
Tink

Well, the definitions are a little strange. It looks to me like a register map. REG_OFFSET is likely defined somewhere to be 4 or 8 (depending on whether the processor is 32- or 64-bit).

In essence it's saying that the values for OFS_RCV_BUFFER, OFS_TRANS_HOLD, and OFS_SEND_BUFFER are all stored in the same register. The next line suggests that OFS_INTR_ENABLE is stored in the next available register. I've seen many hardware designs where the device's control registers occupy a block of memory (memory-mapped that is) and each individual register is addressed by adding the register's offset to the base address of the memory block. Something like this:

It's odd to do things that way unless the programmer expects the size of the registers to change (which is what I believe Tinkster was referring to). However, changing the register size has tons of other implications: do the individual fields within the same register change their bit widths, or are the extra bits added simply wasted? If they change, the bit masks need to be updated, etc.

I find it odd, but then again, I haven't seen everything so...