Hi all,
I'm designing a multi-frame/multi-component video grabber and I need to DMA some data.
The hardware puts the data on some DRAM memory not used by the kernel.
To read the data from user space, I map a data chunk to a virtual user space address thanks to mmap.
Then I may modify the data from software and output it with again the hardware thanks to a DMA.
I'm wondering about cache coherency issues.
I've read the ldd3 but I don't understand to mix mmap and DMA cache management.
Do I have also to map the data chunks in a kernel virtual address space ?
Is it possible to flush/trash the CPU cache from user space ?
Thanks a lot for your help
Stéphane

It looks to me that you need to have the space as non-cacheable. Or I'm wrong?

Hi,
To be more precise : I need the data to be cached for software processing of the data.
My problem is that the data is updated by hardware DMA. So I need the CPU cache to be updated when the DMA puts new data.
The Linux Device Driver 3 deals whit that problem on chapter 15 ( http://lwn.net/Kernel/LDD3/) but I don't understand how to pratically implement it.
Indeed, I wrote a user space application that uses the data.
But the LDD3 provides kernel space functions to do that. For example, the kernel provides the function


void dma_sync_single_for_cpu(struct device *dev, dma_handle_t bus_addr,
size_t size, enum dma_data_direction direction);


But the arguments are not available from the user space (when using mmap). My question how to do that ?
Should I address this issue from the kernel (in a driver) before the user mmap the data ??