Just a simple question :

Do we have lost all intrrupts between spin_lock_irq-->spin_unlock_irq?
(or after spin_unlock_irq we get all of them ?)

try this link, this might be able to help you some:
http://www.ussg.iu.edu/hypermail/lin...06.2/0310.html

I see that but it wasnt helpful.
I want to know what happen to all hardware interrupts during spin_lock_irq to spin_unlock_irq ? obviously during these macros ISR will not called but i want to know is there a queue (or some thing else) that stores these interrupts ?

even if irq's are disabled, i think the interrupt controller will still have the status within. so that, as soon as the interrupts are enabled for the processor, the controller will deliver those ones. the order in which the interrupts are delivered to the processor should also be configurable, may be by assigning priority for them in the interrupt controller.

note that the above are all my assumptions...

When you disable IRQs, then the particular CPU on which you are running will not accept any interrupts (other than NMI = Non-Maskable Interrupt) until interrupts are re-enabled.

Any other CPU in the machine, whose IRQs are not disabled, can still receive interrupts.

The actual servicing of hardware interrupts is controlled by a chip (probably part of the processor now) called an APIC, which prioritizes and remembers the various incoming interrupt-requests, deciding which one should next be presented to the CPU. Disabling IRQs simply prevents the APIC from delivering any interrupts (other than NMI) to that CPU; it does not prevent those interrupt-requests from accumulating.

When the CPU enables IRQs again, the APIC will begin delivering interrupts to it again.

So... a hardware device doesn't have direct access to "the" interrupt request line: it presents its signal to the APIC(s), which brokers the request to the CPU(s) according to the interrupt-enablement status of the CPU(s) and the priority of simultaneously-occurring interrupt requests.

But please note that a hardware device will typically present an interrupt request to the hardware only for a limited amount of time. "You snooze, you lose!" If you do not accept and service the interrupt within that time, the interrupt can be withdrawn and therefore 'lost.'

Different types of CPU hardware have different designs and different names for their interrupt-controller hardware, but every system necessarily has one (or several).