Makefile question

benobi · 08-09-2005, 04:55 PM

I have the following code in a cpp file that I'm trying to compile

Code:

#include <iostream>

using std::cout;

int main()
{
	#if __DO_THIS__
	cout << "do this\n";
	#endif

	#if __DO_THAT__
	cout << "do that\n";
	#endif

	return 0;
}

And I'm trying to use this Makefile:

Code:

CXX = g++
CXXFLAGS = -Wall -c -D__DO_THIS__
CXXFLAGS2 = -Wall -c -D__DO_THAT__

OBJ_DIR =
OBJ_EXT = o86

SOURCES = main.cpp
OBJECTS = $(SOURCES:%.cpp=$(OBJ_DIR)%.$(OBJ_EXT))

main1: $(OBJECTS)
	$(CXX) -o $@ $(OBJECTS)

$(OBJ_DIR)%.$(OBJ_EXT): %.cpp
	$(CXX) $(CXXFLAGS) -o $@ $<

main2: $(OBJECTS)
	$(CXX) -o $@ $(OBJECTS)

$(OBJ_DIR)%.$(OBJ_EXT): %.cpp
	$(CXX) $(CXXFLAGS2) -o $@ $<

When I type "make main1" it compiles it using CXXFLAGS2, which I'm pretty sure it's because

Code:

$(OBJ_DIR)%.$(OBJ_EXT): %.cpp

was used twice. Is there a better/correct way to write this makefile so that I can compile the code with one set of compiler flags and then another set of compiler flags?

jonaskoelker · 08-09-2005, 09:36 PM

Moving the decision (between THIS and THAT) into main[12] and/or using variables spring to mind. RTM.

hth --Jonas

benobi · 08-10-2005, 11:14 AM

I can't use variables since this is for a larger program I'm trying to write, I just simplified it so it'd be easier to understand on this forum. Obviously this is a trivial example. One version of the program runs on one way, the other version runs on another way, so instead of making two different copies of the program where most of the files are the same except for this one, I want to be able to set a compiler flag so that it compiles and performs one way (different function calls and included files) or the other way. I don't want to edit the .cpp file everytime I want to build it a certain way. Just want to type make main1 or make main2 and let the computer do the rest.

jonaskoelker · 08-10-2005, 12:07 PM

I meant *makefile* variables.

benobi · 08-10-2005, 01:00 PM

Ok thanks I see how I can use %if $(VARIABLE), %else, %elif, etc, but how do i pass the string "main1" and "main2" from the command prompt into these variables?

jonaskoelker · 08-10-2005, 02:08 PM

short example:

Code:

do=
main:
\t      wtf is $(do)

Code:

$ make do=this
wtf is this
(...)
$ make do=that
wtf is that
(...)
$ exit

hth --Jonas

benobi · 08-11-2005, 01:11 PM

Still not 100% sure how the syntax works. I have this:

Code:

CXX = g++
CXXFLAGS = -Wall -c -D__DO_THIS__
CXXFLAGS2 = -Wall -c -D__DO_THAT__

OBJ_DIR =
OBJ_EXT = o86

SOURCES = main.cpp
OBJECTS = $(SOURCES:%.cpp=$(OBJ_DIR)%.$(OBJ_EXT))

do=

main: $(OBJECTS)
	$(CXX) -o $@ $(OBJECTS)
	$(OBJ_DIR)%.$(OBJ_EXT): %.cpp
	
	%if $(do) == 1
		$(CXX) $(CXXFLAGS) -o $@ $<
	%elif $(do) == 2
		$(CXX) $(CXXFLAGS2) -o $@ $<
	%endif

SOURCES2 = different_program.cpp
OBJECTS2 = $(SOURCES2:%.cpp=$(OBJ_DIR)%.$(OBJ_EXT))

different_program:
	$(CXX) -o $@ $(OBJECTS2)
	$(OBJ_DIR)%.$(OBJ_EXT): %.cpp
	
	%if $(do) == 1
		$(CXX) $(CXXFLAGS) -o $@ $<
	%elif $(do) == 2
		$(CXX) $(CXXFLAGS2) -o $@ $<
	%endif

It's telling me there's no rule to make main.o86. Also from the command prompt do I type:

Code:

$ make main do=1
$ make different_program do=1

Since eventually I want the Makefile to compile several programs, so I want to be able to differentiate between them.

jonaskoelker · 08-11-2005, 01:42 PM

I was just thinking:

Code:

CXXFLAGS = -wall -c -D__DO_$(do)__

RTM to see if there's a toupper or similar. RTM in any case.

hth --Jonas