Makefile question - multiple compilation flags
I have the following code in a cpp file that I'm trying to compile
Code:
#include <iostream> Code:
CXX = g++ Code:
$(OBJ_DIR)%.$(OBJ_EXT): %.cpp |
Moving the decision (between THIS and THAT) into main[12] and/or using variables spring to mind. RTM.
hth --Jonas |
I can't use variables since this is for a larger program I'm trying to write, I just simplified it so it'd be easier to understand on this forum. Obviously this is a trivial example. One version of the program runs on one way, the other version runs on another way, so instead of making two different copies of the program where most of the files are the same except for this one, I want to be able to set a compiler flag so that it compiles and performs one way (different function calls and included files) or the other way. I don't want to edit the .cpp file everytime I want to build it a certain way. Just want to type make main1 or make main2 and let the computer do the rest.
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I meant *makefile* variables.
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Ok thanks I see how I can use %if $(VARIABLE), %else, %elif, etc, but how do i pass the string "main1" and "main2" from the command prompt into these variables?
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short example:
Code:
do= Code:
$ make do=this |
Still not 100% sure how the syntax works. I have this:
Code:
CXX = g++ Code:
$ make main do=1 |
I was just thinking:
Code:
CXXFLAGS = -wall -c -D__DO_$(do)__ hth --Jonas |
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