I am developing a driver and am trying to enable IOMMU on an x86_64 AMD Opteron platform and RHEL 4.6 (kernel 2.6.9-67.0.10.ELlargesmp) with memory >4GB. The IOMMU setting is enabled in the BIOS. There is no size setting so I pass "iommu=memaper=4" kernel boot option to set the size to 512M. In the kernel messages, I see:

kernel: Checking aperture...
kernel: Your BIOS doesn't leave a aperture memory hole
kernel: Please enable the IOMMU option in the BIOS setup
kernel: This costs you 512 MB of RAM
kernel: Mapping aperture over 524288 KB of RAM @ 60000000

but later in dmesg, I see:

kernel: PCI-DMA: Using software bounce buffering for IO (SWIOTLB)

If IOMMU is really enabled, why would software bounce buffering be used?

We have another RHEL4.6 x86_64 Opteron host with memory >4GB which has an IOMMU size setting in the BIOS. Its dmesg shows:

kernel: PCI-DMA: Disabling AGP.
kernel: PCI-DMA: aperture base @ 80000000 size 524288 KB
kernel: PCI-DMA: Reserving 512MB of IOMMU area in the AGP aperture

There is no mention of SWIOTLB. Does it mean that this host has AGP and my first one does not? My driver is failing DMA on the first host, but not the second. Could this be the reason? Thanks!

First does the chipset support IOMMU some of the processors do but the chipsets they are built on don't. Seconf I had a similar issue setting up XEN recently I had to explicitly tell the kernel to turn on IOMMU despite it being active in the BIOS. I think it is something like IOMMU=1 As far as having access to the RAM if you are using virtualization extensions like IOMMU then it is is not workign and you are developing in a virtualized environment you could likely encoutner hardware communication issues especially with something like Direct Memory Access.

Thanks for the reply!

iommu=1 did not work for me. I also tried iommu=force which did not work (maybe they're the same).

Regarding the chipset, I did find this comment in the 2.6.9 kernel IOMMU code (pci_gart.c):

"Use the integrated AGP GART in the Hammer northbridge as an IOMMU for PCI."

Does this imply that if there is no AGP, the IOMMU will not be enabled in the kernel?

I would interpret the documentation that way for that chipset, meaning no AGP, no IOMMU. if you try IOMMU=Verbose and check DMESG looking for IOMMU what do you see?

Hi scheidel21,

iommu=verbose showed nothing new. I've put this issue aside for now as it's not urgent for the time being. Thanks for your help!

Being NON-Technical am wondering why given so many searches and posts on this, why not, or where, exists a list of chipsets and processors which DO/NOT support IOMMU so we can ensure intended/possessed combinations do/not support.




Steve Apiki's article of "8/9/2006" explained a bit, are processors/chipsets/motherboards newer than fixed for this ?

http://developer.amd.com/documentati...892006101.aspx

Because IOMMU is a feature like 64-bit it is implemented first on newer high end chips, even now not all chips don't support x64. It's a feature when you are looking to buy equipment you see if the feature is available on what you want to buy.