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Old 11-04-2007, 09:05 AM   #1
xeon123
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Makefile variables?


In a Makefile,

1 - what means the following lines:

Code:
%.bin: %.elf<-- What means %.<anything>?
        objcopy -Obinary $*.elf $*.bin<--What means $*?

floppy.img: $(PROG).bin
        dd if=/dev/zero of=$@ count=2880
        dd if=$< of=$@ conv=notrunc<-- What means $< and $@ ?
2 - This symbols are called environment variables?
 
Old 11-04-2007, 11:19 AM   #2
David1357
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Re: Makefile variables?

Quote:
Originally Posted by pedrosacosta View Post
In a Makefile,

1 - what means the following lines:

Code:
%.bin: %.elf<-- What means %.<anything>?
That is how you define a rule to build an arbitrary .bin file. For example, if you wanted to build "blah.bin", you could type "make blah.bin" and the make file would use this rule.
Quote:
Originally Posted by pedrosacosta View Post
Code:
        objcopy -Obinary $*.elf $*.bin<--What means $*?
$* evaluates to the base file name of the target. For example, if you were building "blah.bin", $* would be "blah".
Quote:
Originally Posted by pedrosacosta View Post
Code:
floppy.img: $(PROG).bin
        dd if=/dev/zero of=$@ count=2880
        dd if=$< of=$@ conv=notrunc<-- What means $< and $@ ?
$< is the name of the first dependency file (in this case "$(PROG).bin") and $@ is the name of the target (in this case "floppy.img").

Quote:
Originally Posted by pedrosacosta View Post
2 - This symbols are called environment variables?
I do not really understand this question.
 
  


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