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Old 01-15-2005, 07:19 PM   #1
jrtayloriv
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Registered: Jun 2004
Location: Inland NW, US
Distribution: Ubuntu
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CONFIG_NR_CPUS (maximum num cpus option)


I have a Toshiba A-70 S256 with P4 HT. I was told that hyperthreaded processors need SMP support enabled. My question is how high do I need to set CONFIG_NR_CPUS in kernel config? Could someone direct me to a good site to learn a bit more about this option or explain it themselves? A google search only turned up with tons of config files. BTW I am running kernel 2.6.10 if that makes any difference.

Thanks,
jrtayloriv
 
Old 01-16-2005, 06:41 AM   #2
guzzi
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Registered: Jun 2004
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cpu count

hello rtayloriv

When doing a kernel compile a few minutes ago I saw the same deal. I think it was defaulted to 8 CPUs. Thats where I left it.

My system is a dual 2.8ghz HTXeon, and the fresh kernel works all four using the default number with no problems.

Presently there are 2 folding at home work units cooking and a CD is playing and I'm surfing this web site. It must work.
 
Old 01-16-2005, 08:55 AM   #3
jrtayloriv
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I know it works, but reading the info about it in menuconfig, it says that each extra processor adds eight kilobytes to the size of the kernel. I want to know first of all what the minimum i need is and second, I am just curious to know what it means and how it works.

thanks anyway,
jrtayloriv
 
Old 01-16-2005, 01:04 PM   #4
foo_bar_foo
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Hi,

just put 2
cause that's all you have.
no need to have room for more that you have. (kind of a no brainer)

I'm not really sure about the rest of it and i am as far from an expert on this stuff as one can get.
but this is kind of the types of things involved.
obviously with capacity for more cpus the code structures for acpi, interupt handeling, soft riqs, scheduling and cpu affinity all just have to be that much larger. I think it's not really that the interupt routing table is going to end up bigger but that possibly the structures pinting to the interupt handeling
tables have to be bigger. It may also be that some of the underlying (low level) ram paging structures need to be a bit larger in order to accomodate cpu specific data if there are lots of cpus.
 
  


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