I have fpga/asic device and I have very big problem with understaning what can perform role as interrupt-controller in device tree. Here is picture:
http://imgur.com/a/UtOma
Idea:
subinterrupts block should be defined in device tree with node, for example for subinterrupt block no. 23:
Code:
subinterruptBlock23 {
compatible = "uio-pdrv-genirq-modified-by-me"; //device driver for interrupt handling
subint_mask_reg = <0x80b01014>;
subint_status_reg = <0x80b01018>;
interrupts = < 0 23 4 >; //none spi int, line nr 23, int active when high level on line
interrupt-parent = <&mainIntBlock>;
};
Then interrupt-controller is main interrupt block:
Code:
mainIntBlock: interrupt-controller {
compatible = "how to write platform driver for this one";
reg = <int_status_reg_ADDR, 4>;
interrupt-controller;
#interrupt-cells = <3>;
};
Is above good approach? Can we register main block 32 hw interrupt numbers into linux IRQ numbers (irq-domain)? Or it is not possible because only processor input interrupt pins can be registered to irq_domain (so in other words only processor pins can perfom role as interrupt-controller)?
If answer is that we can define main-block as interrupt-controller then:
1.) how to write platform driver in linux kernel space for this interrupt-controller? Is any generic platform driver based on which I can follow?
2.) what happen when I disable interrupt in processor? So there will be scenario that interrupt bit is set in subinterrupt block and main interrupt block but doesn't go to processor as interrupt is disabled in procesor register. Will interrupt handler be invoked in this case or not ebcause interrupt signal has to reach processor?
3.) Should I inform linux somehow to which processor pin main interrupt block is connected? If so how? - by defining interrupt-parent? How to write linux platform driver which handles interrupts on processor pins?
I ahve read a lot articles in website, many chapters in a books and I still don't understand the above. If someone could share his knowledge I would be grateful.
