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You need to be root, or have a lax security policy to switch into sched_rr or sched_fifo - otherwise you'll be always running at sched_other.
As far as differences go, there is only one and you probably won't meaningfully have a way of demonstrating it. SCHED_FIFO can not be preempted for time reasons; sched_rr may be preempted by exhaustion of it's time quanta in the current scheduling epoch for a higher priority task. The only way I can think to effectively demonstrate this would make your system unusable once you've executed the program.
In general, if you need something to run without interruption then choose sched_fifo, with the understanding that you MUST YIELD TIME to the system. Otherwise, choose sched_rr, and at least you'll allow higher-priority tasks to preempt you. In either case, you need to have an explicit need for some kind of predictable task execution latency - so you're either writing something that is extremely time critical, or you're just playing around. Be careful - it is very easy to starve your entire system of resources in a tight-loop; if your task is highest priority in that case, you will no longer have a usable machine.
I wrote a program to examine the behavior, I compiled it to create two FIFO threads, and the other to create two RR threads. Both binaries run using root. From the output of the program, data written by the two FIFO threads (with same priority) still overlapped each other. Which didn't show any FIFO behavior.
2) You may have missed this:
"As a consequence, it may preempt the currently running process if it has the same priority."
SCHED_FIFO of the same priority _may_ interrupt each other on the same core, if they have the same priority - it isn't forbidden by the POSIX standard, and the kernel only needs to meet POSIX compliance.
3) Additionally, you don't say whether you are on single core machine, or multi-core. In any event your increment of the index loop is likely unsafe.
4) When you need high-prio scheduling, you generally should look to the rt kernel series. Additionally, you need to update your BIOS settings on intel to remove as many SMIs as you can, and on top of that you will likely need to switch off the HPET since it's counting mechanism uses both SMIs _and_ can miss interrupts
5) Finally, what about "... you probably won't meaningfully have a way of demonstrating it" was difficult to grasp? A naive counting program won't be the way to explain FIFO vs. RR. You're better off just trusting that the kernel devs have gotten this one correct.