LinuxQuestions.org - [SOLVED] lshw: L2 cache size vs capacity

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lshw: L2 cache size vs capacity

Hi all,

I just bought a laptop with a T4400. Looking through lshw output turned up the following for the L2 cache:

Code:

        *-cache:1

            description: L2 cache

            physical id: 6

            slot: L2 Cache

            size: 1MiB

            capacity: 4MiB

            capabilities: burst internal write-back unified

I'm curious as to why the size (1Mib) and capacity (4MiB) are different. Surely it can't be possible to stick something on the CPU to increase the L2 cache size, right?? So what does this mean?

I'm running 64-bit Linux Mint (derivative of Ubuntu). The kernel config says CONFIG_X86_L1_CACHE_BYTES=64 but I found nothing about the L2 cache.

Any idea what this is about? Can I somehow unlock more cache to get a 4MiB L2 cache for free? :)

Thanks,

GR

With the cache, you leave it to the kernel. My guess is that both figures are correct. You are not considering width. 1Megx8bits = 1 Megabyte
1 meg x 32 bits wide = 4Mb. That's what's going on.

Quote:

Originally Posted by business_kid (Post 3979444)

My guess is that both figures are correct. You are not considering width. 1Megx8bits = 1 Megabyte
1 meg x 32 bits wide = 4Mb. That's what's going on.

False.

The B in MiB means bytes. The 1MiB is correct. I don't know what the 4MiB is supposed to mean, but it is not the width thing you said.

I am going to venture a wild guess. The actual possible size is 4 while the amount in use is 1.

Quote:

Originally Posted by jefro (Post 3979824)

I am going to venture a wild guess. The actual possible size is 4 while the amount in use is 1.

What could "possible" mean in that context.

The CPU and cache were built together in one chip. There is no way to add anything nor modify anything. The size of the L2 cache is 1MiB and the only way to get more is to discard the whole CPU chip and put in a different one, in which case no "capacity" for L2 defined by this chip would matter.

IIUC, the chip has two cores. I'm not sure how many L2 caches it has. I think it is one 1MiB cache shared by two cores, but I'm not sure. Maybe each core has its own private 0.5MiB cache or maybe each core has its own private 1MiB cache.

If the two sizes differed by a factor of two, I might guess that the L2 caches were private so one size was per chip and one per core. But I think the L2 cache in that model is shared and the factor of four difference is not correct even if I'm wrong about the L2 cache being shared.

Intel's Core 2 processors are spliced together and pasted on a board that contains the L2 cache which is shared with all cores. Each processor might be able to handle 4 megabytes, but are programmed to access 1 megabyte of L2 cache for your model because the board they are pasted to only has 1 megabyte of L2 cache. Sure you can take an X-Acto knife and start splicing out your core and place it into a board that has 4 megabytes of L2 cache, but you have to reprogram it to a different model. Though the knife have to very, very sharp to get through the epoxy that covers the chip.

Only AMD K10 cores has a feature to unlock both the cores and cache, but that does not mean that you should do it. They are locked for a reason and this reason is to protect your data from becoming corrupted.

Thanks, all. I posted the question on tomshardware.com also. Bottom line: T4400 is a locked Core 2, the L2 cache cannot be unlocked.

GR