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Old 01-13-2018, 07:33 AM   #1
SuvenduKumar
LQ Newbie
 
Registered: Jan 2018
Posts: 1

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CCM module of iMX6 uController configuration


Hi All,

I am working on a device having iMX6 processor(TQMa6D module) and 2 pcs SPI chips (SC16IS750 and HI-3585) embedded in the device. As per the Schematic diagram,
--> MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 connected to HI-3585 for 4Mhz clock
--> MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 connected to SC16IS750 for 16Mhz clock

As per the requirement, I have created a patch file as :
========================
@@ -43,6 +43,33 @@
status = "disabled";
};

+ soc {
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ compatible = "simple-bus";
+ interrupt-parent = <0x1>;
+ ranges;
+
+ aips-bus@02000000 {
+ compatible = "fsl,aips-bus", "simple-bus";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ reg = <0x2000000 0x100000>;
+ ranges;
+
+ ccm: ccm@020c4000 {
+ compatible = "fsl,imx6q-ccm";
+ pinctrl-0 = <&pinctrl_ccm>;
+ reg = <0x020c4000 0x00004000>,
+ <0x020c4028 0x007236c1>,/*CCM_CS2CDR register*/
+ <0x020c4060 0x019c00d6>; /*CCM_CSOSR register*/
+ #clock-cells = <1>;
+ };
+ };
+ };
+
disp0: display@0 {
compatible = "fsl,imx-parallel-display";
#address-cells = <1>;
@@ -250,6 +277,16 @@
>;
};
};
+
+ ccm {
+ pinctrl_ccm: ccmgrp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x130b0
+ MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
+ >;
+ };
+ };
+

disp0 {
pinctrl_disp0_ipu1: disp0grp-1 {

========================
And build the linux image with success and running. But, from my embedded application running inside the /home path, it is not able to transmit/receive any data through these SPI chips. Please note that the device/unit is a sealed unit, with a debug and flash ports. So, I`m not able to probe the clock lines with a oscilloscope.

As I have no/little experience in CCM module configuration/enable, please help me, if the patch file needs any other parameter.

SuvenduKumar
Bangalore, India

Last edited by SuvenduKumar; 01-13-2018 at 07:38 AM.
 
  


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