smp Linux able to run with L1 I-cache and D-cache disable?
 

Hi:
I am trying to debug some cache issue.
So I want to disable L1 cache to check, but I got issues:
"AFAIU, load/store exclusive instruction will cause a precise abort(refer to CA7 TRM 6.4.1)"
My question is:
1. it it possible to disable L1 data cache to boot linux?
2. any good suggestion to make sure cache it's cache issue?

Thanks

You could give details about the platform/program you are experiencing problems with. (You didn't even specify the CPU you are using.)
(My blind-guess is that you have a synchronization error in your multithreaded program.)

Hi:
I am using Cortex A7MP.
But I am not familiar with Software part.