A code file declares a procedure in this manner:
There is a define that begins with
The ellipsis indicates that this one line carries on for much longer but this question is limited to two points.
1. This looks recursive. Please explain how that works in defines.
2. What is the significance of the ## that precedes "name;"

I won't tell you the solution, just suggest you to try: g++ -E source.cpp > source.e
and check the content of that file.
I hope that will help you to understand.

I tried that with the complaint that an include file could not be found. The output file did not go far enough to get to the point of interest. This is an include file of a larger application. It has a make file with eight lines and a two critical lines appear to be

make.rules is a file of 1443 lines of text and is far beyond my expertise. A search for "g++" and "gcc" in the Makefile and the make.rules was not productive. What might be changed to cause g++ to save the preprocessor output file?

there can be a macro specifying the flags, for example CPPFLAGS. But also you may try to set make to print commands as they executed and you will need to copy that command and add -E.

Self-Referential Macros

Concatenation

I took the suggestions and wrote some code using that macro, discovering that it is not recursive. The first instance of CONDITIONALPROC is replaced by the contents of the define and that ends the replacement. The macro creates three lines of code and the final contains a procedure name prefixed with CONDITIONALPROC. The purpose of that is so that a custom scripting language can easily recognize the function name and parse it out. We do telemetry work and that custom script language is used to translate between various file formats.
I found it complicated because I still have not figured out how to get the Makefile to keep the preprocessor output somewhere. And that is complicated by multiple include files from multiple directories.

Maybe this question will help me.


The makefile and the code that it builds is located here:
The last line in the Makefile is:
file make.rules is located here:
So to enable a local build I think I need to set something like an environment variable, name it ROOT_DIR and its value should be something like:
So I did
and saw that then I tried this command line entry

the reply was:
What am I not recognizing?

Either:
or

I am missing something here. Am I to understand that the environment variable ROOT_DIR cannot be set with a separate and specific operation and that it must be a command line argument used when I start the make process?
I am a Linux novice and probably miss what is obvious to you.

It cannot be set by a separate executable, because each process has its own set of environment variables (child processes inherit the initial environment from their parent).

You could also set it before, with export (this is a shell builtin command, not a separate executable):
It's usually better not to though. When you do the setting as part of starting the process, you see it right there, and won't get surprised by some setting you made earlier in the session and forgot about.

References:
GNU Bash: Bourne Shell Builtins, export.
GNU Make: How Variables Get Their Values

Re: When you do the setting as part of starting the process ...
Yes, that is the best approach.
To each of you, thanks for your time.