multiple makefile argument

RudraB · 01-27-2010, 10:04 AM

dear friends,
In my fortran code, I have a makefile:

Code:

liblm_a.a: 
	cd LMTO-A ;  make
liblm_b.a: 
	cd LMTO-B ;  make
PROGRAMS: 
	cd lmto ;  make
irun:
	cd ASR ; make
all:  liblm_a.a liblm_b.a irun PROGRAMS

now, the corresponding makefile for irun is has something like:

Code:

nis.o:nis.c
	$(CC) -c nis.c
bit_unm.o:bit_unm.c
	$(CC) -c bit_unm.c
ldos.o : ldos.f90 param.o 
	$(FC) -c $(FFLAGS) $(FPAR) ldos.f90 
main.o : main.f90 util.o ldos.o fermi.o band.o dos.o \
	 mmat.o hop.o shared.o param.o kind.o cgreen.o \
	 bit_unm.o nis.o echo.o pardos.o file.o \
	 ../LMTO-A/liblm_a.a ../LMTO-B/liblm_b.a
	 $(FC) -c $(FFLAGS) $(FPAR) main.f90 
mmat.o : mmat.f90 thread.o param.o kind.o  
	$(FC) -c $(FFLAGS) $(FPAR) mmat.f90 
newfit.o : newfit.f90 param.o 
	$(FC) -c $(FFLAGS) $(FPAR) newfit.f90 
param.o : param.f90 kind.o 
	$(FC) -c $(FFLAGS) $(FPAR) param.f90

now i have problem with param.f90!
Actually I have 2 param code: param_fcc.f90 and param_bcc.f90 for 2 different system. So, I have to manually copy either of this 2 as param.f90 and then compile the main makefile as

Code:

make all

or

Code:

make irun

to compile the irun!

What I am thinking is of

Quote:

make all fcc

or

Code:

make irun fcc

to copy the param_fcc.f90 to param.f90 and compile.

So basically, what I want to do is transfer the second argument to another makefile.
Is it possible?

ForzaItalia2006 · 01-27-2010, 11:45 AM

Hey,

I don't think that it is possible to pass multiple TARGETS to a sub makefile, because the TARGETS aren't stored in a variable - as far as I know. Only the specific target which make is currently executing is available in a variable, named $@. But as an alternative, you could work with common variables as shown below. Take a look at the two make files below, make_toplev and make_sub. make_toplev is the top-level makefile while make_sub is a sub-level makefile in any of your sub-directories. Generally, it's easier to not use makefile names like make_toplev; instead just use makefile/Makefile.

make_toplev:

Code:

all:
        @echo "Top-Lev: TARGET: all"
        @echo "Top-Lev: PLATFORM: $(PLATFORM)"
        make -C sub -f make_sub PLATFORM=$(PLATFORM) all

irun:
        @echo "Top-Lev: TARGET: irun"
        @echo "Top-Lev: PLATFORM: $(PLATFORM)"
        make -C sub -f make_sub PLATFORM=$(PLATFORM) irun

The -C argument to make causes make to change the directory before reading/executing the makefile. The platform is passed to the makefile via the PLATFORM variable and finally passed through to the sub makefile.

make_sub:

Code:

all:
        @echo "Sub: TARGET ALL"
        @echo "Sub: PLATFORM: $(PLATFORM)"

irun:
        @echo "Sub: TARGET irun"
        @echo "CP fparam.$(PLATFORM) fparam.f90"
        @echo "Sub: PLATFORM: $(PLATFORM)"

Finally, you would then call your top-level makefile by for example

Code:

# make PLATFORM=fcc [-f make_toplev] all

Note: these two makefiles aren't really complete. It would be generally useful to check if the platform variable has really be defined among others.

Hope that helps,
- Andi -