Linux module "Hello world" Makefile is missing something
Hi!
I'm trying to run a "make" on a basic Makefile I created for a "Hello world" linux module, however if I run "make" or "make clean" it fails to work. I have to write more stuff in order to make it work (redundant stuff cause I define that stuff in the Makefile). First, the Makefile: Code:
obj-m := helloworld.o Code:
$ make Code:
$ make -C /lib/modules/$( uname -r )/build M=$PWD |
would you be invoking make from within a makefile? i would imagine you'de be invoking the compiler
here's an example makefile from Xcplay (i didn't write the makefile i just happened to have it on hand) Code:
SHELL := /bin/sh |
Here is an example of a Makefile for a kernel module.
Now the important thing here to note is that the red dots shown below must be replaced by a TAB, replacing them by spaces will cause Makefile to malfunction. Code:
obj-m += hello.o |
With no file helloworld.c , the make command will reply :
" make: Nothing to be done for `all'. " Example hello.c http://www.cyberciti.biz/tips/compil...el-module.html Code:
#include <linux/module.h> /* Needed by all modules */ Code:
http://www.captain.at/programming/kernel-2.6/ .. |
@anishakaul: The tabs made it work. Thanks!
Also replacing make for $(MAKE) looks very elegant: Code:
obj-m := helloworld.o |
Quote:
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