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Old 07-26-2011, 03:06 PM   #1
rainbow82
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How to do a direct memory access?


Hi, I have a single board computer previously running DOS. I recently made Linux running on it. Now that the system is running Linux, I have to translate the code that was supported by DOS. The code has segments that allow direct access of memory mapped registers through the macro _MK_FP and do read/write.

I have read that where DOS allows this kind of direct memory access, Linux does not. Is there a way to do this in Linux?

Thanks..
 
Old 07-27-2011, 09:37 AM   #2
JohnGraham
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Quote:
Originally Posted by rainbow82 View Post
I have read that where DOS allows this kind of direct memory access, Linux does not. Is there a way to do this in Linux?
Not from user-space. You'll probably need to write a kernel-space driver and use phys_to_virt() (see this). If you need an introduction to writing device drivers, this is a good start.
 
Old 07-27-2011, 09:44 AM   #3
dugan
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A better question would be: what does the memory mapping code do? What is its intended result? There might be a higher level mechanism to accomplish the same thing.
 
Old 07-28-2011, 01:18 PM   #4
smallpond
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Linux has a device /dev/mem to provide access to physical memory.
Here's an example of how to use it:

http://ar.linux.it/pub/srt-2007/devmem2.c
 
Old 08-02-2011, 11:54 AM   #5
rainbow82
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Hi, I tried to write a device driver to access some memory mapped hardware locations on a board attached to PC-104 single board computer. The hardware is actually an FPGA, the registers of which I want to access. I am using ioremap(), ioread16() and iowrite16() functions to do I/O. I write to a location and then read it back to verify whether the write is happening or not. Whereas some reads come out correctly, others don't. For instance, when I write to 0xB8000, the read comes out correctly, whereas a write to 0xD0000 does not. (0xD0000 is base address of above mentioned FPGA).

Can somebody please help me what's going on?

Thanks
 
Old 08-02-2011, 05:55 PM   #6
theNbomr
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Its possible that some addresses are write-only. ISA bus address decoding does not always uniformly decode read & write cycles, since the -MEMR & -MEMW are separate logic signals, and the hardware designer is free to decode them both, or just one. Some hardware is inherently write-only.

--- rod.
 
Old 08-02-2011, 08:03 PM   #7
sundialsvcs
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My concern here is ... even if you do manage to write to the latch-addresses from a user mode program ... how do you expect to get the timing right? You need a device-driver to be doing that on your behalf.
 
  


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