FPGA and high impedance (is it 1 or 0)

Four · 01-12-2008, 09:58 PM

Hi,

I'm making a processor on an FPGA.

Code:

 __________________
|                  |   Bus Line bellow
|                  |___._______.__________
|                  |___|.______|._________
|   Controller     |___||,_____||.________
|                  |   |||     |||
|                  |   |||     |||
|                  |  _|||_   _|||_
|    Active        |  |F1  |  | F2 | ....
|__________________|  |____|  |____|
        |               |       |
        |_______________|_______|_______ ...
                        
                        ^
                        |
                        |
                   Each F does a function

The controller sets the buss line to a number. Each F* looks at it and if its their number it does its function.

Problem:
Lets say the controller gives out a number that noone is assigned?

What I'm thinking is for each function to send a signal of logic high back to the controller saying

Quote:

ok someone is assigned this number you don't know who but just wait until I'm done Thanks

Now if noone is assigned the number the bus line represents then all F*'s "active" signal will be at high impedence.

Will "active" viewed by the controller be a 1 or a 0? And will it be reliable.

Perhaps another design?

Thanks

Eric Elliott · 01-13-2008, 08:30 PM

Does make not specify output for undefined inputs? It seems that is what you are asking, what is output for input without specified output.

andrems · 01-14-2008, 08:08 AM

The design I would use to interface a controller with other function blocks would be

Code:

 __________________
|                  |   Bus Line bellow
|               out|___.________.__________ a0
|               out|___|._______|._________ a1
|   Controller  out|___||,______||.________ a2
|               out|___|||._____|||._______ CE
|                  |   ||||     ||||
|                  |   ||||     ||||
|                  |  _||||_   _||||_
|                  |  | F1  |  | F2  | ....
|__Active__ack[in]_|  |_____|  |_____|
        |  |            |  |    |  |
        |  |___________ | _|___ | _|____ ...
        |_______________|_______|_______ ...

The controller sets the function address and after that sets the Chip Enable (CE) signal to prevent spurious behavior. If any of the F* recognizes its address on the bus, it sets the ack signal. If no ack is received, the controller times out; if ack is high, the controller knows the bus is busy (in this case, ack would remain high as long as the F* is running).

EDIT:
High impedance is usually "1" (output with an open collector transistor), ie, if there's nothing on the bus, it holds "1", but it goes to "0" if any other signal in that bus goes to "0".