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Old 08-13-2014, 09:36 PM   #1
Registered: Nov 2012
Location: SF Bay Area
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Makefile can't export variable

Here is the code:
ifeq ($(chipset),y)
export MY_FLAG

It get error once I compiled it, any suggestion?
Old 08-15-2014, 09:37 AM   #2
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make has make variables, bash has shell variables, your environment has environment variables. export is a bash command to set an environment variable from a shell variable. There is no need to do this with make variables, since you have full control over the things make runs. Are you trying to cause a make variable to be persistent after make runs? This is not supported by make, and the environment that it is using is discarded when it completes. You could use the source command to run a bash script in your current environment.
Old 08-15-2014, 01:27 PM   #3
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I need a better example of where that code exists and what you're trying to do with it.

An example is that I have a script which I invoke to perform two make actions. One is a normal Makefile for Linux gcc of C based code. The second one is a Qt Makefile which was autocreated by qmake and as a result is different, plus also self contained. My main point was that I wanted to control my version, date, and time of compile and not have them re-generated by macro substitution in the code or within the Makefiles because the time would be different. As a result I had to figure out how to declare variables in the outer BASH shell script to be exported to the two Makefiles which would import them and agree that they were valid variables.

This may not be what you're trying to do, but here's the example and how it worked:

Again, example is BASH script running as my primary interface, defining variables for Version and Date/Time of build, and then running two different Makefiles:

# From within the BASH script
export RELEASE_VER=X.y.z
export BLD_DATE=`date +%D-%T`
Next step was still within that BASH script to make variables which were acceptable to the various Makefiles:

DFLAGS="$DFLAGS -D'__APP_VER__=\"$RELEASE_VER\"'"        # Adds release version and defines macro for program use
UIDEFINES="'__APP_VER__=\"$RELEASE_VER\"'"               # (GUI) Adds release version and defines macro for program use
UIDEFINES="$UIDEFINES -D'__BUILD_DATE__=\"$BLD_DATE\"'"  # (GUI) Adds build date and defines macro for program use

export DFLAGS

cd $HOME/AppDirectory;
make;                            # Run make for main application

cd $HOME/GuiDirectory;
make;                            # Run make for Qt GUI

The "App" Makefile is pretty generic, here are some relevant lines from it, and it works for me, I get things working and don't experiment if I don't have to go any further, some may have thoughts and better ways, I just stopped when it did what I wanted.

And of course I've redacted out actual file and final names with generic replacement words.


CFLAGS= -I. -O0 -ggdb -Wformat=2 -Werror -Wall -Wextra -Wswitch-default -Wswitch-enum -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations -Wmissing-noreturn

# Required libraries required for certain computations
LFLAGS= -lm -ldl

OBJS= <my list of objects> filename1.o filename2.o etc ...

GCC= /usr/bin/gcc

%.o:	%.c
	$(GCC) $(CFLAGS) $(DFLAGS) -c $<
# Notice above where DFLAGS is used, that came from my calling script

app:	$(OBJS)
	$(GCC) $(OBJS) $(LFLAGS) -o app
Next are some portions of my Qt Makefile which originally was is typically auto-generated by qmake, and I had to define a .pro file which uses the name UIDEFINES, the symbol I exported out of my calling BASH script. It merely turns out that the form of how those variables are used are different for this make versus the classical gcc type of make file.

CC            = gcc
CXX           = g++
CFLAGS        = -pipe -ggdb -Wl,--export-dynamic -O2 -Wall -W -D_REENTRANT $(DEFINES)
CXXFLAGS      = -pipe -ggdb -Wno-write-strings -Wl,--export-dynamic -O2 -Wall -W -D_REENTRANT $(DEFINES)
The Qt Makefile is just different and so you see how I had to differently construct that UIDEFINES variable to properly get it to be interpreted within the Qt Makefile.

This is probably a lot more complicated than what you were trying to do.

Note a very important point is that you can invoke make with the -d argument or --debug=level to specify a level of debug and see the actions of make. That's pretty much how I debugged this to get my variables properly interpreted within each Makefile.


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