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Old 10-31-2010, 03:50 AM   #1
littlebigman
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Question [newbie] A couple of questions about makefiles


Hello

I have very little C/Makefile skills, and am trying to figure out how to convert a regular Makefile into another that will turn the application into an ipkg package. To make matters a bit more interesting, the application is cross-compiled from x86 to a non-x86 CPU.

A first thing I notice, is the alternative use of "=" and ":=", and the presence/absence of "export", regardless of whether the line uses "=" or ":=":

Code:
ARCH=bfin
HOSTCC:=gcc

export ROMFSINST:=$(TOPDIR)/scripts/romfs-inst.sh
export SHELL=/usr/bin/env bash -c '. $(TOPDIR)/include/shell.sh; eval "$$2"' --
Could someone explain what the difference is?

Thank you.
 
Old 10-31-2010, 05:00 AM   #2
PehJota
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According to the GNU make documentation, assignment with '=' causes "recursive expansion"; that is, variables referenced within variable assigned this way are expanded on demand. Say you have a variable 'foo', and you set it as follows:
foo = $(bar)
Note that make has no problem with you referencing a currently undefined variable when using recursive expansion. Then, later on you can define 'bar' as follows:
bar = Hello.
When you reference 'foo', it is finally fully expanded to the value 'Hello.'.

Assignment with the ':=' operator causes "simple expansion". Variables that are simply expanded are immediately replaced with their values.

If you know about pointers in C, then you can imagine simple expansion as working with values and recursive expansion as working with pointers. I'm not sure why, in your example, 'ARCH' and 'HOSTCC' are set differently though; for static values such as those, I don't see a difference between the two expansion schemes.


'export' adds a variable to the environment of any future child processes. So in your case, if you export 'SHELL' and then call `gcc`, then GCC will be able to "see" your custom 'SHELL' variable. Most or all shells (bash, ash, csh, etc.) also offer similar variable exporting functionality.
 
Old 11-01-2010, 06:46 AM   #3
littlebigman
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Thanks much for the help.

Am I correct in understanding that regular variables are used within the script, while variables need to be exported when they will be read by an external application such as GCC?
 
Old 11-01-2010, 06:49 AM   #4
PehJota
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Quote:
Originally Posted by littlebigman View Post
Am I correct in understanding that regular variables are used within the script, while variables need to be exported when they will be read by an external application such as GCC?
Yes, the makefile can work with any variables you define, but a child process such as GCC can only access variables if you export them to its environment.

And as I mentioned before, this applies in shell scripts too.

Last edited by PehJota; 11-01-2010 at 06:51 AM.
 
Old 11-01-2010, 07:23 AM   #5
littlebigman
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Thank you.
 
  


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