what is a make file
hi
can sombody plz tell what a make file is and how is it created thanxs linorg:newbie: |
A makefile is a file that contains instructions
for tools to do repetitive tasks on files, when involved repeatedly it will only touch files that have a newer date than their related resulting file. I.e. gcc test.c -o test in a makefile will only execute gcc if you modified the source after you last compiled it. You create them using your favourite editor. Cheers, Tink |
it is used to compile a program from source, it is made by the developers for everyones benefit.
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so is it somewhat similar to batch file in dos
how do i execute a makefile what extension does it have |
rofl, the equivilent of a batch from dos is a shell script, makefile is differnet, but at basic level I cannot say you are wrong...
you do not execute a makefile, it is called from another executable. first off see if there is a file called "configure" in the directory with the makefile, if so type: ./configure when that is finished or if there is not one type this: make that will call the makefile and compile the software. then to install type: make install that calls the makefile section for installing the program. |
And no, it's not like a batch. It's way
smarter :} and serves a completely different purpose. It's primarily targeted at programmers, to cut down on compile times by only recompiling things that have been modified. You call it Makefile (no extension) and you invoke it by typing make<ENTER> Cheers, Tink |
does this means a single directory can have only one makefile..
to create a makefile i should just put the commands to be executed in a file called makefile and just call make from the promt in the same directory... consider the following makefile for compiling the kernel module i'm learnimg to write (taken from a tutorial frm tldp.org) Makefile for a basic kernel module TARGET := hello-1 WARN := -W -Wall -Wstrict-prototypes -Wmissing-prototypes INCLUDE := -isystem /lib/modules/`uname -r`/build/include CFLAGS := -O2 -DMODULE -D__KERNEL__ ${WARN} ${INCLUDE} CC := gcc-3.0 ${TARGET}.o: ${TARGET}.c .PHONY: clean clean: rm -rf {TARGET}.o are all the labels used here (target,clean ...) preefined. |
Quote:
if you called your makefile my_makefile.txt you'd invoke it with make -f my_makefile.txt Quote:
Cheers, Tink |
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