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reuse Makefile on different .c?
hi there:
i have just figured out how to do a simple Makefile but got this question. how would i write a makefile that can be reused by several .c files? what i have now is:
COMPILER = gcc
CCFLAGS = -lm
myprogram: byteorder.c
${COMPILER} ${CCFLAGS} -o byteorder2 byteorder.c
clean:
rm -rf *.o a.out
i want both "buteorder.c" and "byteorder" to be a variable, so that it can be used by other .c files.
cheers
CHUN
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