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Old 08-14-2012, 02:01 AM   #1
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Registered: Aug 2012
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Question Memory fencing at compiler level and hardware level


asm volatile ("" : : : "memory")
I know that this provides a compiler level memory fence and processor can still do reordering when this is used.

Is there anyway I can achieve both compiler level fencing and processor level fencing with a similar instruction?

I came across,
asm volatile("sfence" : : : "memory")
What does this do? Does it provide only compiler level store fencing?

Any inputs on this will be very helpful.


Last edited by prateek.shetty; 08-14-2012 at 02:02 AM.


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