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Makefile not working for kernel module

I have tried creating a make file to run a simple hello world module though keep getting the following error when I input make in the command line:

Code:

make -C /lib/modules/3.5.0-23-generic/build M= modules

make[1]: Entering directory `/usr/src/linux-headers-3.5.0-23-generic'

make[2]: *** No rule to make target `/usr/src/linux-headers-3.5.0-23-generic/arch/x86/syscalls/syscall_32.tbl', needed by `arch/x86/syscalls/../include/generated/asm/unistd_32.h'.  Stop.

make[1]: *** [archheaders] Error 2

make[1]: Leaving directory `/usr/src/linux-headers-3.5.0-23-generic'

make: *** [all] Error 2

I have tried two methods for creating the Makefile though keep getting the same above error:

1:

Code:

obj-m += hello-1.o



all:

        make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules



clean:

        make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean

Code:

obj-m += hello-1.o

KDIR = /usr/src/linux-headers-3.5.0-23-generic

all:

        $(MAKE) -C $(KDIR) SUBDIRS=$(PWD) modules

clean:

        rm -rf *.o *.ko *.mod.* *.symvers *.order

Where could I be going wrong I have following some tutorials on creating kernel modules and have followed the tutorials word for word.

This is the basic "module Makefile" :

Code:

obj-m    := hello-1.o



KDIR    := /lib/modules/$(shell uname -r)/build

PWD    := $(shell pwd)



default:

        $(MAKE) -C $(KDIR) SUBDIRS=$(PWD) modules



clean:

        rm -f *.o *.ko *.mod.* *.symvers *.order

In Make file just write :-

Code:

obj-m:= hello-1.o

without any space and run following command

Code:

make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules

. But Instead of

Code:

$(PWD)

write the whole path of makefile. Make sure the letter'M' in name of makefile is in Upper Case and also replace

Code:

$(shell uname -r)

with whole path of build, that I suppose in your case would be "3.5.0-23-generic". Make sure your c file and Makefile are in same directory i.e. folder.