doubt in make file
 

Hello
i am new to linux.so i have one doubt in makefile.i found that the makefileis used to compile more than one program simultaneously.....am right?...i am some douts in below example makefile command.
"make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules"

1.what for this "shell" is used before uname -r?

2.what is the use of "$" symbol?why it is used after kernel path?

3.what is " build M=$ modules"?

please help me to know the above things...
Thank you

You are right that make can be used to compile more than one program simultaneously, but there is more to that: it handles dependancies in big projects. You tell it in the makefile that this and that object files must be compiled in order to compile that executable that is needed to install that stuff etc... and make will compile all the stuff in the right order.
Try 'man make' for more detailed information.
As for your command, are you using bash? I suppose 'shell' is a link to bash...
the $ symbol, in bash is for variables. Try man bash for more informations.

Your questions are about bash or sh and not make. The "uname -r" command returns the kernel version of the running kernel. The "$" symbol is how variables are referenced. The variable PWD is the present working directory. The shell maintains this variable.

You should read through the make info file or pick up a book on using make. The Makefile is used to automate the build process. If a file used to produce the target is newer than the target, then a rule is triggered, which runs the commands needed to update the target. The target might be a library, program or a pdf file. Your example has the target "modules" which isn't a file to produce. The rules will produce or update the kernel modules if the source files are newer.