Hi Everyone,

I have an FPGA which exposes BAR0 to an x86 Host. The FPGA has a variety of peripherals on it, I2C, UART, SPI etc. All of these peripherals can be accessed by accessing different offsets from the BAR0 address.

I am running linux kernel 4.14 on the host and have written a pcie device driver which probes off the device id manufacturer ID of the FPGA.

The device driver calls pci_iomap( to obtain a cookie used to access the BAR. This works fine and via this mechanism I can read/write to the FPGA address space after calling ioremap on the cookie.

What I am trying to do now however is create a platform device and add as a resource the BAR0 address + the I2C offset, to get the i2c driver to probe off this new PCI device.

The problem I am having is that I am getting a EBUSY return code. when I try to register the resource to the platform device, after the pci_iomap has taken place.

The resource type is IORESOURCE_SYSTEM_RAM | IORESOURCE_MUXED and the start of the resource is the BAR0 address as returned by pci_iomap + I2C_OFFSET.

In the I2C device driver, I am expecting to do an ioremap on the resource and be able to access it by de-refencing


A couple of questions:

Is this the correct software flow for managing multiple devices exposed by a PCIe BAR0 address space?

If not, what is the correct flow?

If yes, any ideas on what may be going wrong?

If the device zones are completely independent, I would rather go with *pci_iomap_range() to map every zone separately. You can probably modify the FPGA so that zones for each device are page-aligned so that only one driver will access one page - allows avoiding many errors with bad offsets between the drivers.

You would probably create one driver that will handle the PCI registration and than separate drivers for each device type? If this is possible, it might be a good idea so that you have simple code for each of the drivers and if you change one of the peripherals, you do not need to modify the others.