Via epia px5000eg
Hi, I owe an EPIA PX5000EG board shown here. Yet I like to know which processor family I need to select in the kernel for my 500MHz-VIA Eden ULV. I guess as it is not C7 it should be VIA C3-2. Is this correct for best performance? Please advise
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It is a C7 and that's what you use. But maybe I missed something. Why do you say it's not a C7?
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Thanks but I got misled by the PDF stating the 1Gz version is clearly a C7 Processor and the 500 has the Via Eden ULV which I thought is a C3 family CPU. To my humble opinion Via Eden ULV is at least <> C7 ( http://en.wikipedia.org/wiki/List_of...icroprocessors )
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Seems like you have what you need now. (can mark this SOLVED if you want, under Thread Tools)
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Well not really as I still dont know which option to tick in the kernel, I currently have C3 and it gives me longhaul APIC detected. Longhaul currently broken in this configuration and VFS unable to mount but guess that has not to do with the CPU. Anyway I would appreciate what option to tick in the kernel, but I will give C7 a shot this time.
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First compile for the C3 and give the kernel (config) files C3 sufixes. Then compile for the C7 and give appropriate suffixes. Mention old, C3 and C7 kernels in Lilo (or Grub, or Uboot, or whatever) and rerun Lilo or its equivalent. Then reboot. If the C7 kernel is instable (or will not boot at all) , then delete it and run with either the original or the C3 kernel. And then, MOST importantly report here what your findings were, so all the world can learn and nobody needs to redo your experiment again. |
managed to compile kernel 2.6.34 for c3-2 and c7 and both work, however I believe C3-2 comes near the EPIA as it explicitly says enabling usage of SSE (which C7 also should have):
CONFIG_MVIAC3_2: Select this for a VIA C3 "Nehemiah". Selecting this enables usage of SSE and tells gcc to treat the CPU as a 686. Note, this kernel will not boot on older (pre model 9) C3s. CONFIG_MVIAC7: Select this for a VIA C7. Selecting this uses the correct cache shift and tells gcc to treat the CPU as a 686. The VIA Eden ULV has the Esther core (500MHz-1.5 GHz) - NanoBGA2 21mm×21mm package, 400 MT/s FSB which comes closest to a C7 to my opinion |
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