https://www.bbc.com/news/technology-57009930

Apparently IBM have made a 2nm wafer (of ICs) in their lab. That is not 7nm, not 5nm, but 2nm.

The breakthrough is remarkable, if it's real. The problem was that a FET consists of an 'N' or 'P' doped conductive channel, with (at 7nm) gate material of the opposite polarity all around the channel. So your N channel FET would have a P doped gate, or vice versa for the P channel devices. There must be complete insulation between gate and channel.

At the point where N meets P, insulation was insufficient, electrons would get through, and all hell would break loose. That problem blocked progress. Everyone was stuck on this issue. If IBM get this on an industrial scale, IBM have leapfrogged generations of devices and it is really huge news.

They are quoting 45% performance increase and 75% less power consumption in comparison to today's devices. In fact, if manufacturing at 2nm was mastered, every chip on the market today would suck, and everything not on 5/7nm would become obsolete. Watch for politics getting in here, as this is a US breakthrough. It offers the chance to the US to lock out Russia & China, until they hack their way in.

Any reflections?

Phones will get a LOT faster, batteries will get a LOT smaller (because no vendor really wants them to power our devices for much longer, otherwise we would have 1LB cell phones that would last a week on a charge now) and tech will get a lot greener. I expect it to start around the end of 2024, and for me to be able to afford it by 2032. (Assuming of course that I still LIVE in 2032!)

This part concerns me. Not the politics part, just that it is a US breakthrough. We have been behind on semiconductor development for awhile now. Even US companies do all their work overseas. All of the sudden when US influence is getting shaky now we have this massive jump that puts us on top? That alone gives me pause about the reality of it. Sadly every world power uses propaganda that usually has no real substance. It's just not as obvious as others sometimes.

If true, might make 'wearables' more of a reality, but do I want them.....I don't think so.

A nice small quiet computer that can do all my daily tasks is all I need - that's why I've been using Raspberry Pi 4 series SBC's lately.

(Along with my silent 4" square desktop box.)

IBM does research and business, not manufacture chips. They will license this to one or more chip makers, and they may or may not all be in the USA.
Other researchers working on the problem may come out with alternate ways to make chips in that scale within a year or two.

If they can figure out how to steal the tech, China will come out with their version soon after.

The human has a proven history at suckage when it comes to keeping djinn in bottles!

IBM over engineers everything. It reminds me of the joke
IBM is in the elephant-building league. Personally I find it difficult to imagine them bringing a wafer fab machine to market.

@fatmac: RazPis are fine until you want the range of software. Anything computationally or graphics-intensive isn't really there on Arm yet. 64bit has less software than 32. There's a (Arm-based) Qualcomm Snapdragon 865 out with fairly decent specs, but the average cpu has ~2Ghz, which makes lousy single threaded performance. I believe the RazPi can be overclocked. I have read you can go to 2.2Ghz without changes which I intend to try; actually, I was going to stop at 2.0Ghz. Something like FreeCad would crawl.

According to what I read on the AnandTech coverage of this, IBM isn't building a new fab machine, they're using equipment from ASML and just perfecting manufacturing techniques, and actual gate sizes on this are probably like 12nm, with some individual feature maybe hitting 2nm here or there (and basically all FinFET are not 'really' whatever their stated pitch is - as in 7nm is not all 7nm transistors, and so on, because once they moved to 3D land it all became "equivalent node" because they're just trying to shorthand for density).

You can read more here:
https://www.anandtech.com/show/16656...first-2nm-chip (has a table breaking it all out by transistor density vs marketing nanometers)

This is also apparently the result of many years of work, not just an 'all of a sudden' thing, and while IBM is the 'face' of it, it is apparently the result of considerable collaboration between Intel, IBM, GloFo, ASML, and so forth. I agree with wpeckham as well - it is probably many years before this actually sees the light of day in a real product, and it will likely go through various other revisions and so forth as it is scaled to production. It'll be interesting to see who gets there first in terms of a production chip and/or if GloFo will be manufacturing on this node (if I remember right they threw in the towel on 10nm and related some time ago, but with demand going through the roof recently maybe they'll change course).

Yeah I know 2nm fab doesn't have 2nm Fab all the way. Power components need big wide chunks of silicon. There the emphasis is on getting a channel from open to closed in the shortest time possible. The possibility exists that you have a 50nm transistor channel handling, say, 10Amps. Then as you start turning off, the conducting area shrinks. So the outer core goes off, and the inner core (capable of handling only 3A) is tasked with handling 10A, and it blows. It was a regular problem with power fets.

Regardless of that, the critical problem holding up the best brains in the business was outlined in post #1. With big fab in times past, PN junctions used look atomically like
++++NNNN----, where N is a positive or negative doped piece on silicon where the doping has been cancelled by electrons or ions from silicon of the opposite polarity.

Chemical mixes and doping has been optimised, and we now have
++NN--, but when we try to move to +N-, electrons will shoot through because the insulation is insufficient. Unless it's all smoke and mirrors. From my understanding, Both the Finfet transistor design and chemical optimisation of doping had reached limits. So I can understand perhaps 4nm, but 2nm is way off scale, and would require a world class breakthrough.

Now the only places you need 2nm are CPU & GPU cores, and you're down to 0.8V-1.2V, but you need things to work there. The 'N' area in the middle is proportional to voltage - the bigger the reverse bias, the more NNs there are.

i am always excited about progress related to computers, i dont understand much but i am happy customer

Well, there will come a point very soon when further miniaturization will be prohibitively expensive, and consequently impossible, or simply bad for business. IBM's "breakthrough" looks like it's too far, too fast. What I need to see is an in-depth technical article or paper explaining how the various challenges were overcome. I had predicted

• 4nm if it turns out to be possible.
• 3nm or a fraction, perhaps 3.3nm,if it turns out to be possible.
• 2nm or some fractional decrease, if it turns out to be possible.
• 1nm or some fractional decrease, if it turns out to be possible.

To see them leap frogging 4nm & 3nm makes one suspect a 'smoke & mirrors' exercise.

The percentage decreases are interesting, and the size aimed at is always a gamble. Decreases are usually 20%-30%. 7nm-->5nm = 29%; 5-->4nm = 20%; 4nm --> 3nm = 25%; 3nm --> 2nm = 33%; 2nm --> 1nm = 50%! I expect it to go to fractions soon. I'm not thinking below 1nm, as I don't feel they will get that far.

It's also debatable how much extra speed will come out of whatever transistor shape they find themselves saddled with, as the FinFet will probably have to change to a different shape with different properties. So I was not impressed to see the IBM propaganda talking FinFet @2nm.

Make no mistake, if you can get the world's only fab factory with a couple of machines at 2nm running 24/7/365, you would have the world's biggest profit machine.

EDIT: NOTE TO SELF: You must be boring people silly. Get off your hobby horse and make shorter posts

1 members found this post helpful.

thanks for the explanation, and no, not too long posts

Since IBM doesn't actually produce stuff, they really only do the "big" jumps to demonstrate technical feasibility and help their partners with production ramp-up. They would never have done a 4nm, as that's a "refinement" of the 5nm process for most fabs (TSMC's 4n, which I BELIEVE actually is scheduled to go into limited production late this year). As discussed earlier in the thread, due to the 3d nature of modern transistor design for cpu/gpu, this COULD have been called 3nm. However, they get more news by calling it 2nm, without patently lying. Marketing.

The biggest thing from this IMO is that Intel is now an IBM partner (as is Samsung if I recall correctly), so this could help Intel long term help get back on course with their fabs.

You're very likely to see funny publicity about this stuff. We had this with the 32/64bit changeover and guys trying to convince each other that a Celeron was every bit as good.

FinFet @2nm is impossible, to the best of my knowledge. That's why you have to do a reality check.

You're very likely to see funny publicity about this stuff. We had this with the 32/64bit changeover and guys trying to convince each other that a Celeron was every bit as good.

FinFet @2nm is impossible, to the best of my knowledge. That's why you have to do a reality check.

EDIT: Marketing ploys don't actually go far. A Lithography(or wafer fab) reduction must be accompanied by a performance increase =higher frequency at the same current. And for the size reduction to be real, the same device made in a smaller size must consume less current.

The relevant formula is W(atts) = ½CV²F. With a size reduction, you reduce the C(apacitance); So you can either increase the F(requency) or reduce the W, the power consumption. What you're suggesting doesn't really change the lithography.

What has me wondering about this is the mechanical elements of tiny fab. Take ball bearings: they theoretically don't wear out because the ball has a film of oil or grease, so the balls never touch the inner or outer tracks. But that film is more than 2nm thick…

IBM likely has made a real advancement, but they are not saying much about it. Instead, we get the "2nm" marketing term. The nanometer wars are making the gigahertz wars seem honest by comparison.

IBM sold its microelectronics division to Global Foundries years ago. That IBM is still doing silicon process development is somewhat unexpected.
Ed