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Old 04-28-2010, 11:20 AM   #1
ryande
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makefile question


Hello everyone,

I need some makefile help.

I have ~200 c files in my makefile[$(SRCS)], and it compiles all of the files
using a single gcc command. So each time I make a change in one c
file, it ends up re-compiling all the files, then linking to make the
binary. How can I break out the compilation into individual gcc
commands for each c file, so that make checks the timestamp and accordingly compiles only the modified files.

My current Makefile looks like this.

SRCS=a/a.c a/b.c b/c.c b/d.c
OBJS=a.o b.o c.o d.o

all: clean compile link

compile:$(SRC)
gcc -g -c $(SRCS)

link:$(OBJS)
gcc -o final $(OBJS)

clean:
rm *.o final


Thanks in advance.
ryan
 
Old 04-28-2010, 01:07 PM   #2
CoderMan
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It has been some time since I actually wrote my own Makefile. But the way you are currently doing it is not the usual way of going about it. I think you want something like this:

Code:
all: hello

hello: main.o factorial.o hello.o
	g++ main.o factorial.o hello.o -o hello

main.o: main.cpp
	g++ -c main.cpp

factorial.o: factorial.cpp
	g++ -c factorial.cpp

hello.o: hello.cpp
	g++ -c hello.cpp

clean:
	rm -rf *o hello
That is pasted from a tutorial at http://mrbook.org/tutorials/make/.

There another tutorial I found here:

http://www.cs.duke.edu/~ola/courses/...Makefiles.html

It gives a lot of tips on things like Makefile macros, and mentions a utility called makedepend which will generate the makefile rules for you by looking at the source code.
 
Old 04-28-2010, 02:08 PM   #3
johnsfine
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I don't know make very well. I mainly use a non standard version of boost_build in which the issue in the original post could be handled easily.

Quote:
Originally Posted by CoderMan View Post
I think you want something like this:
The problem with that suggestion is it would require individual rules for each of ~200 modules for which X.o is built from a/X.c

You want some generic rule to say every X.o is built the same way from the corresponding a/X.c

I don't recall how (or even if) you can do that in a makefile (given the complicating factor of all the c files in a subdirectory.
 
Old 04-29-2010, 01:20 AM   #4
CoderMan
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Quote:
Originally Posted by johnsfine View Post
I don't know make very well. I mainly use a non standard version of boost_build in which the issue in the original post could be handled easily.



The problem with that suggestion is it would require individual rules for each of ~200 modules for which X.o is built from a/X.c

You want some generic rule to say every X.o is built the same way from the corresponding a/X.c

I don't recall how (or even if) you can do that in a makefile (given the complicating factor of all the c files in a subdirectory.
Heh... Yah, I use autotools, so I rarely write my own makefiles. But I do remember that make had some system built in for implicitly compiling a lot of the targets.

If you really want to write your own makefiles, read through this section in the official manual on implicit rules. I believe this is what I was thinking of:

http://www.gnu.org/software/make/man...Implicit-Rules
 
Old 04-29-2010, 01:30 AM   #5
TheIndependentAquarius
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Since this thread is related to makefiles, I wanted to know when autotools are readily available which automatically generate makefiles, then why still it is considered important to know how to write the makefiles ?

Is there any special reason that we should know how to write the makefiles ??
 
Old 04-30-2010, 01:11 AM   #6
TheIndependentAquarius
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Got the answer here.
 
  


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