Freescale UPM question
Hi,
I'm working on a MPC8347 embedded system that has a NAND chip connected
to the UPM. Although I'm following the correct sequence in programming
the UPM, I'm unable to write any data to the UPM RAM table. The system is
running Linux 2.6.27. Here is my code snippet:
#define SNSP_NAND_ADDR 0xa0000000
#define SNSP_NAND_MASK 0x881
void __iomem *bank_addr;
int i;
bank_addr = ioremap_nocache(SNSP_NAND_ADDR, 0x10);
if (!bank_addr) {
printk(KERN_ALERT "##### LK_DEBUG: ioremap_nocache FAILED for bank_addr\n");
return;
}
else {
printk(KERN_ALERT "##### LK_DEBUG: ioremap_nocache SUCCESS for bank_addr\n");
}
/* NAND chip will be driven by UPM-A at LBC address SNSP_NAND_ADDR */
out_be32(&fsl_lbc_regs->bank[4].br, SNSP_NAND_ADDR | SNSP_NAND_MASK);
out_be32(&fsl_lbc_regs->bank[4].or, 0xf0000001);
printk(KERN_ALERT "##### LK_DEBUG: bank[4].br=0x%x\n", in_be32(&fsl_lbc_regs->bank[4].br));
printk(KERN_ALERT "##### LK_DEBUG: bank[4].or=0x%x\n", in_be32(&fsl_lbc_regs->bank[4].or));
printk(KERN_ALERT "##### LK_DEBUG: %s : %s :2: UPM-A programmed\n", __FILE__, __func__);
/*
* program UPM-A table
*/
/* setup MAMR for sequential write to UPM-A RAM */
out_be32(&fsl_lbc_regs->mamr, 0x10000000);
/* write 64 words to UPM-A RAM */
for (i = 0; i < 64; i++) {
out_be32(&fsl_lbc_regs->mdr, UPMATable[i]);
out_8(bank_addr, 0); // dummy write
printk(KERN_ALERT "##### LK_DEBUG: i=%d mamr=0x%x\n", i, in_be32(&fsl_lbc_regs->mamr));
}
/* restore MAMR */
out_be32(&fsl_lbc_regs->mamr, 0x00000000);
while (in_be32(&fsl_lbc_regs->mamr) != 0x0)
eieio();
/* verify data written to UPM-A RAM */
out_be32(&fsl_lbc_regs->mamr, 0x20000000);
/* read 64 words from UPM-A RAM */
for (i = 0; i < 64; i++) {
in_8(bank_addr); // dummy read
out_be32(&fsl_lbc_regs->mdr, UPMATable[i]);
printk(KERN_ALERT "##### LK_DEBUG: i=%d mamr=0x%x\n", i, in_be32(&fsl_lbc_regs->mamr));
}
/* restore MAMR */
out_be32(&fsl_lbc_regs->mamr, 0x00000000);
while (in_be32(&fsl_lbc_regs->mamr) != 0x0)
eieio();
So, two questions:
1) why am I unable to write any data to UPM-A RAM
2) If I use some other address in place of 0xa0000000 (e.g c0000000)
I get a machine check in kernel mode, Transfer error ack signal. Why
does that happen? My understanding is that no device has to exist at
this address; when the MPC8347 sees this address, the UPM engine kicks
in and drives the NAND chip.
thanks a lot for any feedback,
LK
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