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Old 03-17-2006, 08:01 AM   #1
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Compiling multiple .c file using single command in makefile


I want to compile my various .c file using makefile. I dont want to specify my .c file name in my makefile. When I add my .c file in my predefined directory it should be compiled using makefile without changing makefile. That means I want my makefile such that it should be able to compile my .c file dynamically.
Old 03-18-2006, 10:46 PM   #2
Registered: Oct 2004
Location: Melbourne-ish, Australia
Distribution: Gentoo, Windows XP Pro
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Personally, I fail at making Makefiles. Hopefully someone comes up with something better than this.

You can run a PHP, Bash, Perl or VBScript (etc) script to dynamically generate the Makefile based on the contents of the directory. You could do all kinds of fun things with 'find' and loops.

You could even call your script 'makemake', just for laughs.

EDIT: I just made up what I wrote above on the spot, but thanks to Google, here's an actual concrete example or two:
If you use fam (file alteration monitor?) and/or cron, you can even avoid having to type a command to compile your program. Be wary about compilations at CRAZY CRAZY INTERVALS.

Old 03-18-2006, 11:49 PM   #3
Registered: Mar 2006
Location: Redmond, WA
Distribution: FC4, WinXP Pro
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It is possible to simply use wildcards in a makefile to tell it to compile all the .c files. The problem is that the whole idea of a makefile is to list dependencies and only recompile parts that depend on things that changed. The dependencies for a .c file aren't simply the .c file itself. You need to list its include files too.

Fortunately, gcc has a -M option to auto generate makefiles. It will correctly identify the include file dependencies. If you follow the directions in the GNU make manual section 4.14, you'll get a makefile that includes other autogenerated makefiles. This means that your main makefile will never change.

Everytime I've used those instructions, I get a makefile that will produce a harmless error the first time it's run (because the submakefiles don't exist yet, and it generates them). I think it would work better if you compromised and allowed your makefile to change. Then you could just run this:
gcc -M *.c > Makefile; make -f Makefile

You could even put that in a script.


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