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Old 11-30-2020, 03:22 PM   #1
RogueWarrior65
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Question SPI Chip Select timing


Iím working with the SPI interface and using the SPIDEV driver to talk to an ADC device. This device requires a one-byte write and a two-byte read. It can handle a clock speed of 1.8 MHz and a sample rate of 100 ksps.
It works but itís running very slowly. Iíve connected a logic analyzer to the system and I can see that the system is wasting a lot of time between SPI transactions where the chip select line is held low.
At the start of the transaction, it sets the chip select line for about 20 microseconds before the system starts clocking out the write data. After it reads the two response bytes, it wastes about 65 microseconds before resetting the chip select line. Basically, no matter what I do, the transaction always seems to take ~100 microseconds thus cutting my ADC sampling rate by a factor of 10.

Is this a driver issue or a kernel SPI code issue or what?
Does anyone know where in the kernel code the chip select timing is being set?
100 microseconds seems like a pretty specific value.
 
Old 12-01-2020, 11:05 AM   #2
business_kid
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Two other random variables are not being mentioned - the ADC settling time, and any config you may have done. You apparently have a clue what the circuit looks like, but we don't. Is there a schematic online?

As width increases, ADC settling time increases. Also, you need to isolate what's holding /CS down.
 
Old 12-02-2020, 08:51 AM   #3
RogueWarrior65
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Allow me to clarify, the presence of the ADC device is incidental because I'm not actually using a device-specific driver. I'm using the generic spidev driver to talk to it directly. The device happens to be a Microchip MCP3204. The timings of that device are in the nanosecond realm.

Under the Linux kernel 4.9.11 that I'm using, it would appear that the only function that sets or clears the chip select line is in spi.c called spi_transfer_one_message(). There is a call to wait_for_completion_timeout() in there which might explain the delay in clearing the chip select line at the end of the transaction but not at the beginning.
 
Old 12-02-2020, 01:25 PM   #4
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Quote:
Originally Posted by RogueWarrior65 View Post
Allow me to clarify, the presence of the ADC device is incidental because I'm not actually using a device-specific driver. I'm using the generic spidev driver to talk to it directly. The device happens to be a Microchip MCP3204. The timings of that device are in the nanosecond realm.

Under the Linux kernel 4.9.11 that I'm using, it would appear that the only function that sets or clears the chip select line is in spi.c called spi_transfer_one_message(). There is a call to wait_for_completion_timeout() in there which might explain the delay in clearing the chip select line at the end of the transaction but not at the beginning.
So like most hardware issues, it really seems to be a software issue.
 
  


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