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Old 07-09-2012, 08:24 AM   #16
sundialsvcs
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Yes, nearly every microprocessor out there uses microcode, built on what is largely a RISC-like internal design ... but the advantage here is that all of the microcode is on the chip. You're not sending-out to RAM nearly as often. Also, you can customize the internal design because you know in advance that all direct access to it is coming from the high-level instruction layer as you have implemented it. Chip designers also provide compilers, and "suggested" (sic) ways that the high-level instructions ought best to be used. Teams such as the gcc team of course pay very close attention. So the chip designers also have a good idea what the actual high-level instruction sequences will be.

Supercomputer applications are usually ##classified##, which of course means highly-parallel processing of maybe low-level functions such as those need by the now-famous ##classified## and ##classified## projects... But, at ##classified## dollars apiece, for each of the ##classified## projects, you can easily afford such goodies.

Last edited by sundialsvcs; 07-09-2012 at 08:30 AM.
 
Old 07-09-2012, 08:58 AM   #17
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One architecture I've aleays thought ought to be much harder to exploit would be Harvard Architecture, since code injection ought to be impossible in use due to pyhsical seperation of instructions and data. I've a feeling the downsides of the architecture would make it tough to implement though.
 
  


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