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Old 12-09-2010, 05:27 PM   #16
Sergei Steshenko
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Fro those who do not know/remember what is waiting WRT OS tasks: http://en.wikipedia.org/wiki/Process_(computing) -> http://en.wikipedia.org/wiki/Process...Process_states .
 
Old 12-09-2010, 05:28 PM   #17
frieza
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unless your processor is 100% dedicated to one process, which is impossible short of building a hardware device just to run that task, the execution time will be guaranteed to vary because the process has to share processor time with other processes, even a 'bare metal' execution of your task might have variances in execution time as no environment is perfectly consistent.
 
Old 12-09-2010, 05:43 PM   #18
Sergei Steshenko
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Quote:
Originally Posted by frieza View Post
... no environment is perfectly consistent.
To be fair, if the CPU is cacheless, if the RAM is SRAM and if there is no DMA, i.e. if there are no factors beyond program control, the environment is consistent - the whole thing is just a deterministic synchronous circuit. But a very dedicated HW is needed for this.

...

The http://en.wikipedia.org/wiki/Ubicom company's goal was to create a much more predictable WRT timing CPU - at least in the early 2000-s.
 
Old 12-09-2010, 05:45 PM   #19
stress_junkie
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Quote:
Originally Posted by frieza View Post
unless your processor is 100% dedicated to one process, which is impossible short of building a hardware device just to run that task, the execution time will be guaranteed to vary because the process has to share processor time with other processes, even a 'bare metal' execution of your task might have variances in execution time as no environment is perfectly consistent.
Yes but that is for elapsed time.

jiml8 is talking about the actual time that the program is executing on the CPU.

Sergei Steshenko is talking about actual elapsed time.

I'm not sure what the original poster's program is measuring but I believe that it is actual elapsed time.

jiml8 has said that there is a distinction between CPU time and actual elapsed time/wall clock time.

Sergei Steshenko is ignoring this distinction and talking about actual elapsed time issues.

It's pretty funny so far.

Last edited by stress_junkie; 12-09-2010 at 05:50 PM.
 
Old 12-09-2010, 05:51 PM   #20
Sergei Steshenko
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Quote:
Originally Posted by stress_junkie View Post
Yes but that is for elapsed time.

jiml8 is talking about the actual time that the program is executing on the CPU.

Sergei Steshenko is talking about actual elapsed time.

I'm not sure what the original poster's program is measuring but I believe that it is actual elapsed time.
Time it takes to perform cache and/or RAM cycles is still CPU time. I.e. if you go to your BIOS and choose slower DRAM settings, every benchmark of yours will show larger CPU time. This is because CPU time is the sum of durations of CPU instructions executed during task executions. So slower cache (rather, cache misses) and slower RAM do increase this time.
 
Old 12-09-2010, 07:42 PM   #21
smeezekitty
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A multitasking OS cannot maintain a constant speed will all the background tasks.
That said, it is no surprise that the speeds are not constant.
 
Old 12-09-2010, 07:51 PM   #22
Sergei Steshenko
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Quote:
Originally Posted by stress_junkie View Post
...
Sergei Steshenko is ignoring this distinction and talking about actual elapsed time issues.

It's pretty funny so far.
Nonsense. You are ignoring the fact that CPU knows nothing (at instructions level) about HW wait states and about the facts of it relinquishing the bus to higher priority masters.
 
Old 12-09-2010, 08:43 PM   #23
jiml8
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Quote:
Originally Posted by Sergei Steshenko View Post
Nonsense. The CPU has no notion of memory refresh. The CPU can't do anything externally while in wait cycles, for example, it can't push current task's registers on stack, it can't process an interrupt.

To the same extent the CPU has no knowledge about DMA.

...
*sigh*

You need to go study about non maskable interrupts. X86 family exerts an NMI for memory refresh. And for DMA. Also, the memory controller in an x86 system is located...where exactly? On the CPU chip. Where else. So of course the processor knows about memory refresh.

Quote:
Spend about $100 or something like that (well, more - you'll need an oscilloscope too), buy a cheap development board for a simple controller - preferably without pipeline, and do something on bare metal from scratch. I.e. write your own BIOS first.

For me it was quite revealing in the late eighties to develop an in-circuit emulator and to use it to debug HW and SW.
I was building SBCs starting in the mid '70s. And an oscilloscope is close to useless these days for that kind of thing. You need a network analyzer.

Been there. Done that. Got the T-shirt.

Edit:

Oh! Are you talking about those little Atmel boards? Yeah, they're pretty nice for learning tools. There's this engineer locally who's taking some real-time programming courses and he comes to me for tutoring. He has one of those. And it doesn't have a memory manager at all, I don't think. Of course, it only has a couple of K of RAM on it anyway. I'm not really sure what all it is able to do because I only ever see it when he comes to me for help with his assignments, and then I focus on his assignment and making sure he understands it since I'm charging him by the hour.

These days when I work at that level it is usually a DSP and I seldom run more than a multitasking executive in it along with my application. At that, I'm less interested in the DSP than in the signal processing I'm using the DSP for.

However, in the past, I've worked plenty of times in plenty of environments on the barest of bare metal. I've started machines by writing the bootstrap code, hand assembling it, and toggling it into the machine from the front-panel switches.

But these days? No one wants to pay me to do BIOS type work. They know I know it, but I'm much too expensive.

Last edited by jiml8; 12-09-2010 at 09:31 PM.
 
Old 12-09-2010, 08:49 PM   #24
jiml8
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Quote:
Originally Posted by stress_junkie View Post
Yes but that is for elapsed time.

jiml8 is talking about the actual time that the program is executing on the CPU.

Sergei Steshenko is talking about actual elapsed time.

I'm not sure what the original poster's program is measuring but I believe that it is actual elapsed time.

jiml8 has said that there is a distinction between CPU time and actual elapsed time/wall clock time.

Sergei Steshenko is ignoring this distinction and talking about actual elapsed time issues.

It's pretty funny so far.
OP is indeed measuring wall clock time. As I understood his question, he didn't realize he was measuring wall clock time and wants to measure only the time the processor spends on that particular process.

Rather than belittle OP as some others have done, I chose to point out the issue and suggest where to look to deal with it.

Now, someone is trying to teach me how to suck eggs. I really don't think it is funny. I think it is sad. I can tell you that I wouldn't hire this person.
 
Old 12-09-2010, 08:56 PM   #25
jiml8
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Quote:
Originally Posted by Sergei Steshenko View Post
Nonsense. You are ignoring the fact that CPU knows nothing (at instructions level) about HW wait states and about the facts of it relinquishing the bus to higher priority masters.
Just what do you think an interrupt does??? Some of it is handled in firmware, some in software, and a small amount in silicon. But the processor is able to know about ALL of that.

Sheesh!
 
Old 12-09-2010, 09:59 PM   #26
catkin
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Quote:
Originally Posted by salasi View Post
All of your data points (from this run) end ...07, in fact 207, 407, 607 and 807. Those will be completely random numbers, of course
So the information is coarsely granular but why those particular numbers?
 
Old 12-10-2010, 01:05 AM   #27
hillgreen
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sourcecode and forwarded message

another one told me 2 days ago: " it was possible to get accurate CPU time measurements on an ordinary machine, without setting any of the parameters for the kernel or requiring that the machine be otherwise unloaded.Unfortunately, that no longer seems to be possible with modern machines. The combination of hyperthreading and multicore processors means that a program may have many different execution and memory resources, depending on what other programs are running. The only reliable way to avoid this is to run a program in isolation. Also, we have found that the Intel Speedstep technology makes the timings from one run to another highly variable."

hope it helpful for discussion.

following is my sourcecode, in case that someone wants to exper... it.

#include<stdio.h>
int divisors(unsigned int n);
unsigned int antiprime(unsigned int x);
int main()
{
FILE *cin,*cout;
unsigned int n,res;

cin=fopen("antiprime.in","r");
cout=fopen("antiprime.out","w");

while (fscanf(cin,"%d",&n) == 1) {
res=antiprime(n);
fprintf(cout,"%d\n",res);
}

fclose(cin);
fclose(cout);

return 0;
}

unsigned int antiprime(unsigned int x)
{
int prime[]={2,3,5,7,11,13,17,19,23,29,31};
int n,t;
unsigned m,p,k,num;

n=0;
num=0;

for(p=0,k=1;k*k <= x;p++)
k*=prime[p];

m=(k/=prime[p-1]);
while(k <= x)
{
t=divisors(k);
if(t > n)
{
n=t;
num=k;
}
k+=m;
}
return num;
}

int divisors(unsigned int p)
{
int i,k,m;
int prime[]={2,3,5,7,11,13,17,19,23,29,31};
int len_of_prime=11;

k=1;
for(i=0;i < len_of_prime;i++)
{
for(m=0;p%prime[i] == 0;m++)
p/=prime[i];
if(m > 0)
k=k*(m+1);//钄″嫆鍏紡
}

if(k == 1)//a prime greater than 31 or a number which is the product of some primes greater than 31. According to Zerle's theory, it is easy to prove that the current integer being checked is not benifit to the result, so it can be defined as 0 as the value to return.
return 0;
else
return k;
}
 
  


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