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Old 08-20-2002, 12:56 PM   #1
boku
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Those makefiles...


I must be stupid! I've been reading the docs on make, automake, and autoconf. Why is it so complicated?

Do you have any advice on how to get the knack of it?
For me it's just a big puzzle.
 
Old 08-20-2002, 01:58 PM   #2
acid_kewpie
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use an ide that makes them for you. they are pretty standard really.
 
Old 08-20-2002, 03:49 PM   #3
Mara
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Kdevelop can make one for you...
 
Old 08-21-2002, 07:05 AM   #4
Malicious
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I doubt that you are stupid. make is not easy! People have complained loud and long about make and there have been countless attempts to replace it or cover it up with a gui project manager, but it is like a bad penny; it just won't go away.

If you break it down, a simple rule for make is:
Code:
<target> : <dependency list>
    <command list>
The target is a file which should be created when the command list is executed. The dependency list is a list of targets (files) that are required when the command list is executed.

Each rule is reduced by checking the depedency list and the target. If any dependency target is missing, find the rule for that target and reduce it. When all dependencies are present, and the target is present, and the target is older than any of the dependencies, execute the command list. If the target is newer than any dependency, no action is required and the rule is satisfied.

The first rule that is evaluated is the first rule in the make file or the rule for the target specified on the make command ("make all"). The only other rules that are evaluated are targets from that dependency list which in turn may have dependent targets, which in turn...

Most confusion comes from the default rules that are builtins for make. "make -p" will display all of the builtins. For instance, one default is:
Code:
.c.o :
    $(CC)$(CFLAGS) -c $<
If xxxx.o is specified as a dependency in a rule that is being evaluated and xxxx.o is not present and there is no rule in the make file for xxxx.o, make will construct the rule:
Code:
xxxx.o : xxxx.c
     $(CC) $(CFLAGS) -c xxxx.c
and then evaluate it. Hopefully xxxx.c will exist and the compile will work. If xxxx.c doesn't exist and you haven't written a rule to create xxxx.c, you will probably get the "no rule to make xxxx.c" error and make will quit.

Another default rule is:
Code:
.c :
    $(CC)$(CFLAGS) $< -o $@
This builtin will build an executable for a .c file. If you only have one c file, there would be one line in your makefile "all : xxxx". Better yet, you don't even need a makefile. Just do "make xxxx" in the same directory as xxxx.c and get the executable xxxx.

If you think your problem is with the default rules, add this line to your makefile: ".SUFFIXES :". This deletes all suffix rules and only uses the rules from the makefile. "make -r" does the same thing.

Use "make -n" to show the commands that will be executed by make without actually executing the commands.

Use "make -d" to show all of the steps make takes in evaluating the rules and resolving dependencies. This has a lot of output, but it does show exactly what is going on.

mumble, mumble, mumble...
 
Old 08-21-2002, 09:26 AM   #5
boku
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Thank you! I will use the Kdev-IDE to generate all files, so that I can give them a close study.
And then some day, I will create a project management utility to end this miserable situation.
 
Old 08-21-2002, 09:39 AM   #6
boku
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Thanks, Malicious! Perhaps there is no simple solution. Some people say that the configure and make files are only going more complex...
 
Old 08-21-2002, 09:39 AM   #7
acid_kewpie
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nah, don't use that, anjuta is much much nicer
 
Old 08-29-2002, 06:51 PM   #8
SparceMatrix
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I highly recommend "Linux Programming Unleashed 2nd Edition". There is a complete chapter on the subject with some very easy examples. I was writing my own Makefiles before I even finished it. At www.amazon.com, you can get factory seconds for less then $15 US.

For an example of what kind of book it is, see my post here:

Why won't this simple program compile?

Any text book is bound to have some errors.
 
Old 03-01-2005, 05:04 AM   #9
sandeeptt
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Rules.make

Can anybody tell me what is the significance of Rules.make file which is sometimes included in a Makefile..
When it is used and Why? and where can I find the nice tutorial on it?
 
Old 03-01-2005, 05:59 AM   #10
theYinYeti
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In case you're still interested:
http://www.jfranken.de/homepages/joh...e/make.en.html

Yves.
 
Old 03-01-2005, 08:19 AM   #11
bigearsbilly
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don't worry.

make does take a long time to
get the hang of.

It did me too
 
  


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