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Recursive Makefile

Hi,

I'm having problems with compiling recursive Makefiles in my directory structure:

My folder layout is:
top/

|- one/

|- one.c (With main function)

|- zero.c

|- two/

|- two.c

in my top folder the make file looks like:

Code:

MAKE_DIRECTORIES = one two



.PHONY: all

all: $(MAKE_DIRECTORIES)



.PHONY: $(MAKE_DIRECTORIES)

$(MAKE_DIRECTORIES):

        @echo $@

    $(MAKE) --directory=$@

in my one and two folder I have the following Makefile:

Code:

.PHONE: all



all:

        @echo $@

        $(CC) $(CFLAGS) *.c

But when I compile it from top folder: make

I get following output:

Code:

one

two

Which states that directory statement by echo in main Makefile is ok but the files are not compiled in one and two. Does anyone know why?

Thanks,
Indy

Quote:

.PHONE: all

Firstly, is the red item a typo?

Indeed, There was this error. Silly. However, it's changed to .PHONY but the result is still the same. I double checked it...

Quote:

Originally Posted by freeindy (Post 4359729)

Code:

$(MAKE_DIRECTORIES):

        @echo $@

    $(MAKE) --directory=$@

It looks like the second line is indented differently from the first. Remember that Makefiles require every command to be prefixed with a TAB, spaces won't work.

Ah thanks!

Indentation was the problem... should be more careful :-)