Processor cache Line Size Tweak
Do anyone on this forum could help me to tweak the processor cache line size? Will it be doable? Below is the breif description of my problem:
Currently, I'm using a PPC processor which has cache line size of 64 KB which is used for all cache line operations and I want the same to be 32 KB (instead of 64) to support one user app which has the limitation.
--> tried to enable the compact mode present in the processor which didn't helped me becuase of some dependency.
--> Changed the CPU table configuration from code which is referred by other programs for cache line size. Got into some wierd Kernel Panic :(
It would be good if someone could share pointer on this regard would help me to proceed further (quickly )
Just from gut feeling..... are you sure the processor cache, for ANY processor, can be modified in software?
What is "compact mode"? And what dependency are you talking about?
Also, what is a CPU "table"?
Just curious - what kind of work is this related to? As in, what are you trying to write?
I don't think it's possible.
Also I'm very curios about the code that is failing to work on a 64KB cache and is working on a 32KB. Maybe you can just edit those instructions, which I still want to see :)
Thanks for quick reply.
-- Just from gut feeling..... are you sure the processor cache, for ANY processor, can be modified in software?
[S]: Maybe,I'm not detailed but I'm taking about the cache operation length which processor will be working on.Like, DCBA PowerPC instruction, in few wonderful powerPC processor's we have facility to make this instruction to work on 32 Byte cache line instead of actual processor cache line.I'm just curious that there are some CPU table and MACRO which informs operating system about cache line (mostly applicable for all OS and ARCH type), so thought if I can tweak something ther to achieve the above behavior for the time being.
-- What is "compact mode"? And what dependency are you talking about?
[S]: Compact mode is something that work on 32 Byte instead of actual hardware specification. This compact modes can vary according to processor.
-- Also, what is a CPU "table"?
[S]: There a Linux source file (I'm not sure about other arch except PPC) which maintains CPU specification for all CPU's.
-- Just curious - what kind of work is this related to? As in, what are you trying to write?
Two things I'm trying:
--> Trying to tweak something which is easy to make whole OS to work on 32 Bytes mode.
--> Write some pieces of ASMs to enable the compact mode ( at this moment too hard for me ).
Thx for your reply.
Actually the code is not failing either in 32 KB neither in 64 KB, we have proprietary applications which is compiled against 32 Byte cache line (which can't be changed because of few restrictions) ,so now we are forcing the native operating system to be in 32 Bytes (or provide some context switch capability like enable/disable of compact feature) as we are using linux as supporting operating system to help prop application's.
Sorry mate, I've never worked on PowerPC and all the stuff you said above confused me even more :(
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