Need help completing Makefile

seriesx4 · 01-05-2006, 04:15 PM

Code:

CXXFLAGS = -O2 -pipe -march=pentium3 -fomit-frame-pointer -c
CXX = g++
SRCS = $(wildcard *.cpp)
OBJS = $(patsubst %.cpp,%.o,$(wildcard *.cpp))
HDRS = $(patsubst %.h,%.o,$(wildcard *.h))

mylib.a: $(OBJS)
	ar cr mylib.a ${OBJS}

clean:
	-rm *.o
	-rm *.a

Problem: When changing .h files the affected .cpp files won't be recompiled.

The .cpp files dependencies on .h files could obviously be pretty hard to resolve and probably includes writing rules "by hand" or using a tool to actually automate the task by scanning the .cpp files.

Is there an elegant solution to rewrite this makefile so that it will take care of all the .h and .cpp files in the directory? Either by using some - for me - unknown feature of make, or by using some other tool?

I don't want to write individual rules for all my files as it's error-prone and time-consuming.

graemef · 01-05-2006, 04:42 PM

I use KDevelop and the projects will manage the make files for me, add a file to the project it gets added to the make file.

graeme.

seriesx4 · 01-05-2006, 04:53 PM

Yes, I used to use KDevelop too, but it consists of 95% av stuff I don't understand or need... Perhaps no big deal it sounds, but if something goes wrong it means you won't be able to fix it.

This seems to be the alternative:

http://www.gnu.org/software/make/man...ake.html#SEC51

Hivemind · 01-05-2006, 05:09 PM

You define SRCS, HDRS and CXXFLAGS but you never use them...

Add this to your Makefile, maybe it will help:

Code:

%.o: %.cpp %.h
	$(CXX) $(CXXFLAGS) $@ $<

bigearsbilly · 01-09-2006, 09:46 AM

use makedepend to write dependencies.

here's how I do it:

Code:

LIB=${PWD}.a
# ---------------------------------
# Standard makefile template
# for libraries
# shouldn't need to touch anything
#       takes the name from the directory
# ---------------------------------

AT   = @
RM   = ${AT} rm -f
ECHO = ${AT} echo
LS   = ${AT}ls
CC   = gcc
CFLAGS = ${DEBUG_FLAGS} -I ${PWD}


DEPENDFILE  = depend.mk

lib:${LIB}

-include ${DEPENDFILE}
OBJFILES = ${SRCFILES:.c=.o}

${LIB}:${LIB}(${OBJFILES}) tidy 



help:
 ${ECHO} OBJFILES = ${OBJFILES}
 ${ECHO} SRCFILES = ${SRCFILES}
 ${ECHO} LIB = ${LIB}
 nm ${LIB}
 

${DEPENDFILE}:
 ${LS} *.c|xargs echo SRCFILES = > ${DEPENDFILE}
 ${ECHO} '' >> ${DEPENDFILE} 
 makedepend -f $@ *.c
 cp $@ $@.bak

tidy:
 rm -f  ${DEPENDFILE}
 
clean: tidy
 rm -f  *.o ${LIB}  .*.swp