make with multiple targets
in several of our projects i need to compile
the same software multiple times with different
defines and for different processortypes.
a simple is this one, it has one common source
but 2 different target processors. the second
target also needs a different define.
my first attempt was this:
PROJ = C101
TARG1 = $(PROJ).hex
TARG2 = $(PROJ)_RJ11.hex
.PHONY : all
.PHONY : clean
all : $(TARG1) $(TARG2)
now i need to declare theese variables different for
each target :
MCU = atmega8515
DEFS = -DDEV_SPECIFIC='"../$(PROJ)/dev_specific_cmd.c"'
MCU = atmega162
DEFS = -DDEV_SPECIFIC='"../$(PROJ)/dev_specific_cmd_rj11.c"'
also i need to clean up all object and library files before
i compile, because i have different processortypes and also
different code activated via #ifdef ... #endif
how can i accomplish that ? i read a lot of make
documentation today, i just seem stuck ;(