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khodeir 05-10-2012 05:56 AM
makefile help needed
 
Hi all ,
I need some help
I made this rule
PHP Code:
SOURCE = a.c b.c
OBJECT = a.o b.o

$(OBJECT) : $(SOURCE)
    @echo "Invoking C compiler for $<"
    $(CC) -c $< 
every time this rule is used , it only compile a.c , any help ?!

pan64 05-10-2012 05:59 AM
you need to define a target, and every dependency will be compiled.
What is your full makefile?
(it this was your full makefile: the first target will be taken, which is a.o

khodeir 05-10-2012 06:03 AM
full make file

PHP Code:
SOURCE = a.c b.c
OBJECT = a.o b.o

all : $(OBJECT)

$(OBJECT) : $(SOURCE)
    @echo "Invoking C compiler for $<"
    $(CC) -c $< 
I want to generate a.o and b.o , so what is wrong with my makefile

pan64 05-10-2012 07:31 AM
how did you try it? Which command did you execute?

khodeir 05-10-2012 07:38 AM
thanks for your reply
Iused "make all"

pan64 05-10-2012 08:01 AM
try -v or -d to see what's happening


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