Hi,
Quote:
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asm volatile ("" : : : "memory")
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I know that this provides a compiler level memory fence and processor can still do reordering when this is used.
Is there anyway I can achieve both compiler level fencing and processor level fencing with a similar instruction?
I came across,
Quote:
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asm volatile("sfence" : : : "memory")
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What does this do? Does it provide only compiler level store fencing?
Any inputs on this will be very helpful.
Thanks
Memory fencing at compiler level and hardware level
