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Old 08-03-2010, 06:34 AM   #1
priyadarshan
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How Copilation proceeds


Hi,

As I am new to linux, I am bit confused how build, ./configure, make, make install occurs...

I mean suppose I have written bunch of .c source files and few header files to support the function within .c files, I want to know how those will converted to binary images??? (I suppose that ./configure, make, make install are for this process)

One another quetion, what is make file????
 
Old 08-03-2010, 06:45 AM   #2
DJ Shaji
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first of all, thank you for not putting an a in place of an i. that would have been beyond the scope of most nerds to answer.

You need a compiler to 'convert' a c program to a 'binary':
gcc *.c

You will get an 'a.out' which is your program. make, automake and friends form a "build system" to compile large programs. You need not bother with them if you don't know what they are.
 
Old 08-03-2010, 06:52 AM   #3
TreborG2
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Talking Actually I think you mean "u"

Quote:
Originally Posted by DJ Shaji View Post
first of all, thank you for not putting an a in place of an i. that would have been beyond the scope of most nerds to answer.
Actually .. I think you meant not putting in a "u" for the "i" as in copulation and of course our dear member 'priyadarshan' actually meant compilation

Last edited by TreborG2; 08-03-2010 at 06:54 AM.
 
Old 08-03-2010, 06:59 AM   #4
i92guboj
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Source files need to be "compiled" to be converted to a format that your machine and your OS can understand. The details will depend upon the language, the compiler, the architecture and the OS, but the basic is always the same. You write the program in a given language that you can (hopefully) understand with some given syntactic rules. Then you pass that program you wrote to a compiler, and a binary object is produced.

This binary file will contain object code that the machine should be able to understand (sometimes with the help of an intermediate interpreter, like usually happens with programs written in Java).

In Linux, C is a very common language to use, and the default C compiler in Linux is gcc. So that's what you use to compile a file written in C.

Make files are nothing but plain text files that hold a set of rules which define the hierarchy between the different source files that conform a given project. Attending to this Makefile, the "make" tool will call gcc (or whatever is needed) to compile all the files, link them together and produce a working binary.

This serves two purposes mainly: first, they instruct the make tool what files need to be compiled and in what order (some files might depend upon some others), and secondly, they instruct the make tool which files need to be recompiled when a given file changes, so you don't need to recompile *everything* each time a single .c file is modified. This actually saves time and simplifies the process when dealing with large projects that involve lots of separated source files.
 
Old 08-03-2010, 07:01 AM   #5
priyadarshan
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Then why do one need to run

./configure
make
make install

to install appliacation written in C???
 
Old 08-03-2010, 07:25 AM   #6
i92guboj
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Because of what I said above.

The above process is not related to C or any other language. It's related to the build system you use. The build system takes care of building the Makefiles, which nowadays are rarely written by hand because of the size of the modern projects. Just think about the Linux kernel, KDE or Gnome to get an average idea. All of these have probably many millions of source code lines. Not a thing to be taken lightly.

The above scheme you've shown belongs to a project that's driven by what we know as the GNU toolchain, the GNU build system or simply "autotools". The configure script is just a shell script that searches for all the required libraries so the user doesn't have to guess all the dependencies by hand. It also allows the user to configure or enable (or even disable) some features at compilation time, some parts of the program or features that might be optional and can also affect the dependencies.

This configure script writes a "Makefile" that then the make tool will use to compile the rest of the files, which can be in C, but also in about any other language. C is just the common case, but not the only one. The make tool will call whatever compiler needs to be called.

The last line calls a target called "install", which usually does what its name says: install the files on your OS. The make tool works with targets. Without arguments it does the default target, which usually compiles the program. But that entirely depends on what the Makefile says. We can't teach you about Makefiles here, there's enough info on the net about both Makeifiles and autotools. There are also different build systems not based on autotools (i.e. CMake).
 
  


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