For user programs, sure. But, user programs in 32 bit mode PAE don't have a virtual address space above 4GB, so user programs don't really know anything about PAE.

The 32 bit kernel itself uses PAE to remap addresses above 4GB into 32 bit space so that it (the kernel) can see them. There is no such need in a 64 bit kernel, as the kernel can directly address this space.

Added (see later post):
And, it appears that AMD and Intel have brought the "Page Directory Pointer Table" concept forward into 64 bit mode, thus making PAE "obligatory" in 64 bit mode. Can it be that they are preparing for 128 bits, or maybe something like "68 bit mode"?

User programs work with virtual memory, not physical memory, so they have no reason to know or care about PAE.

Try reading the relevant parts of one of the AMD or Intel manuals. I think you are missing the basic concepts of the virtual to physical translation.

You also seem to be confusing the highmem feature with the PAE feature.

There are occasions when an OS needs to access memory by its physical address. x86 Linux runs with virtual to physical translation always on. So the OS cannot actually "directly address" physical memory. As a workaround (almost as simple as direct access) Linux built without the highmem feature maps all of physical ram into a contiguous block of virtual address space.

On 32 bit systems, that limits you to 896MB of physical ram. It would limit you to 896MB with or without PAE, so of course you wouldn't build a non highmem 32 bit Linux with PAE.

The highmem alternative splits physical memory. There are certain uses of memory for which access based on physical address is important, so those uses must be limited to a portion of ram with permanent mapping. Most uses of memory don't make access based on physical address important, so those uses can use the physical ram that does not have permanent mapping. That means Linux will occasionally want access to memory that isn't mapped at the moment and will need to map it in order to access it. That is rare and trivial and not due to PAE but due to highmem.

Looking again at your claim:

The kernel runs with certain of its own data and code (regardless of where they might be in physical ram) permanently mapped. It usually (not always) has the virtual address space of whatever process it is servicing mapped (again regardless of where that might be in physical ram). It always has a chunk of low physical ram (not more than 896MB) permanently mapped as described above.

If it needs access to a page of memory that is not any of the above already mapped types, then it must map it dynamically. That can occur both above and below the 4GB boundary and can occur both with and without PAE.

John, does your 64 bit .config have PAE enabled?

Of course not. It isn't enabled. It isn't disabled. CONFIG_X86_PAE isn't there at all. None of the CONFIG_HIGHMEM options are there either.

So far there is only one form of x86_64 mapping. There are no options like PAE or various HIGHMEM to turn on or off in building memory management for X86_64 Linux. It all works only one way, unlike the 32 bit x86 which evolved over a longer period accumulating build time and hardware options.

Do you think the absence of a build option named "PAE" says anything about the technical relationship between the way PAE works in 32 bits and the way the only (and non optional) mapping system works in X86_64?

I stand corrected, but I am very surprised.

From Wiki: http://en.wikipedia.org/wiki/Physica...xtension#Linux
From looking at the picture it appears that in 64 bit native long mode, they require the use of the "Page Directory Pointer Table", thus requiring PAE. Very strange.

I'm surprised you changed your mind based on that. From the exact same page you could have quoted the phrase:
Terminology (do we call it "PAE", what exactly do we mean by "PAE") can lead to some messy disagreements, including apparently between the authors of that page.

If you want to understand it, the best choice is the AMD architecture documentation.

I don't see any picture for long mode on that page. What picture are you looking at?

32 bit non PAE has 32 bit entries and a two level pointer structure.

32 bit PAE has 64 bit entries and a three level pointer structure.

long mode has 64 bit entries and a four level pointer structure. In the AMD documentation they call the level above the Directory Pointer Table the "Page Map Level 4".

The 32 bit entries allow for 32 bit physical addresses, plus a limited set of flags (page protection settings, etc.).

The 64 bit entries allow for 52 bit physical addresses, plus a larger set of flags, plus some reserved bits. The extra flags include the execute protection that can be used to defend against most data overrun exploits.

The 64 bit entry size and format, in my opinion, is the key feature of "PAE" and is shared by long mode.

I have read that 32 bit PAE only supports 36 physical address bits, even on 64 bit CPU's. I don't have a URL handy. But while checking an AMD manual for a detail for this thread, I noticed it says 32 bit PAE has the same (varying by CPU model) limit on physical address bits as long mode. I don't know whether that is a documentation error or whether the 64GB limit on 32 bit PAE is now only a software limit, or whether you could actually use over 64GB with 32 bit PAE. But I also can't think of a reason to want to push 32 bit PAE that high.

My understanding is that PAE was added just to get an additional 4 bits of address space. After all, PAE does stand for Physical Address Extension. Thus my surprise that the PAE architecture is carried forward to 64 bit flat model. I never would have guessed that in a million years. My assumption was that they would have just gone back to the same type of flat model addressing that vanilla 32 bit flat model uses. My mistake. But, like I added to my earlier post, perhaps they are merely positioning the architecture for a similar "68 bit mode" in the future. I dunno. I don't work there.

The picture I'm referring to is directly under the word "obligatory". I'm referring to the bottom half of the picture.

If you did not have a PAE kernel just recompile the kernel with support for it. Its a simple thing to implement really. I think its in processor features, support for large memory and you either select off ,4gb, or 64gb.