configure with static libs
Hi,
I am developing an embedded device using arm platform and there I want to install a mad player in the target. for that I want to copile it in my host with static libraries. I already tried using --enable-static --disable-shared options in the configuration command. Although the command generates static libs, the executable program still requires shared libs when I try command "arm-linux-readelf -d /location/madplay " what should I do in order to build the program completely static ? thank you. |
You make a static library with the ar utility; you have a bunch of object files (.o) and you
Code:
#!/bin/sh You can also do this in a Makefile (make "knows" how to execute ar). This is a a small sample of a huge Makefile for building a library of Numerical Recipes functions. It's edited for size and thus isn't actually usable but if you create a Makefile of this form, you'll build static libraries of your object code (and, a bonus, if you edit any of he contained functions and then execute make only the changed object file will be replaced in the library archive). Code:
# Define this as the parent directory where your include, lib and bin directories live Hope this helps some. |
Hi,
thanks for reply.I still don't understand some parts in your post. I will try and let you know the result. thank you. |
Well, maybe it wasn't all that clear -- so let me back up a little.
A static library is created by the ar (archive) utility and contains compiled object files (.o files). It will be named libsomething.a so that you can link a program with a -lsomething. The math library, for example, is named libm.a and you link it with -lm. If you look in /usr/lib (or /usr/lib64 there are quite a few static libraries named libsomethng.a; that's what they are, they were created with the ar utility, and you link them to a program with -lsomething. How you create a static library is laid out in the Makefile example above. As I mentioned, make knows how to create a static library using a compiler and the ar utility if the Makefile is put together as in the example. You have source files (say, .c), you want to have object files (.o) and you want those object files put into a searchable archive file (aka "library") that can be linked with -lsomething. The Makefile syntax that does this is Code:
$(LIBRARY): $(LIBRARY)(function_name.o) \ The other lines that are important are the dependency lines: Code:
$(LIBRARY)(function_name.o): $(BASDIR)/include/header_file.h Tokens enclosed in braces ( {} ) are system environment variables, those enclosed in parens ( () ) are locally defined in the Makefile. It's worth your time and effort to get to know make if you're going to be doing development work for any length of time -- makes your life much, much easier. Hope this helps some. |
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