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Old 11-09-2009, 03:54 AM   #1
robvoo
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Registered: Jul 2009
Distribution: debian, ubuntu
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spport multiple MSI for pci device on Nehalem architecture


I'm implementing a driver for a costum pci-device which supports 32 message signaled interrupts(MSIs) (the configuration space shows this). The device will be used on platform with a intel E5540 and tylersburg chipset. Kernel 2.6.30.5 is used at the moment.

To enable multiple msi i use pci_enable_msi_block(device,32); to try to enable 32 MSIs. This function returns 1, meaning i could only register one, and indeed when i try to register one interrupt it succeeds.

Trying to find the error i came accros the following piece of code in the kernel.

Code:
drivers/pci/msi.c:
 37 #ifndef arch_setup_msi_irqs
 38 int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
 39 {
 40     struct msi_desc *entry;
 41     int ret;
 42
 43     /*
 44      * If an architecture wants to support multiple MSI, it needs to
 45      * override arch_setup_msi_irqs()
 46      */
 47     if (type == PCI_CAP_ID_MSI && nvec > 1)
 48         return 1;
 49
 50     list_for_each_entry(entry, &dev->msi_list, list) {
 51         ret = arch_setup_msi_irq(dev, entry);
 52         if (ret < 0)
 53             return ret;
 54         if (ret > 0)
 55             return -ENOSPC;
 56     }
 57
 58     return 0;
 59 }
 60 #endif

This states, it will always return 1, if the number of vectors is greater then 1? And an architecture should override this function to support multiple MSI? I can't realy find were and if this function is overwritten for my architecture (Intel Nehalem).

So my question is, how can multiple MSIs be aquired for my device.
NOTE: my device does not support MSI-X so this can't be used.

Kind Regards,

Rob
 
Old 11-11-2009, 04:40 AM   #2
cladisch
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Registered: Oct 2008
Location: Earth
Distribution: Slackware
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Quote:
Code:
 43     /*
 44      * If an architecture wants to support multiple MSI, it needs to
 45      * override arch_setup_msi_irqs()
 46      */
 47     if (type == PCI_CAP_ID_MSI && nvec > 1)
 48         return 1;
This states, it will always return 1, if the number of vectors is greater then 1? And an architecture should override this function to support multiple MSI? I can't realy find were and if this function is overwritten for my architecture (Intel Nehalem).
Yes. Yes. A simple grep could have told you that your architecture is "x86" and that this function is overridden in arch/x86/kernel/apic/io_apic.c.

The x86-specific code looks like this:
Code:
        /* x86 doesn't support multiple MSI yet */
        if (type == PCI_CAP_ID_MSI && nvec > 1)
                return 1;
 
Old 11-14-2009, 03:22 AM   #3
robvoo
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Is it possible to adjust this code to support multiple MSI on the Nehalem architecture?

If so, how should i proceed?

Kind regards,

robvoo
 
Old 11-16-2009, 08:25 AM   #4
cladisch
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Quote:
Is it possible to adjust this code to support multiple MSI on the Nehalem architecture?
Probably.

Quote:
If so, how should i proceed?
Write that support code.
 
Old 08-21-2013, 05:26 AM   #5
raghavendra kakarla
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Registered: Aug 2013
Posts: 1

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Hi,

I have face the same problem now that add the code for support multiple MSI for X86 architecture.
Please Give some help for how to proceed.

Thanks in advance.
 
  


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