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Old 12-24-2007, 04:03 AM   #1
Nayaka
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Memory management in 2.4/2.6 kernel


In 2.4/2.6 kernel(running on top of x86 processor), there is a concept of "flat address space", meaning all the segments will be using same set of linear address space. Kernel code,Kernel data,User code,User data etc will start from 0x00000000 and end with 0xffffffff. If linear addresses of two segments overlap then how's the paging unit going to map them uniquely to different physical addresses? Won't there be any collision?

Can somebody explain how "flat address space" works? And what is the meaning of "overlapping linear address spaces between different segments"?

Last edited by Nayaka; 12-24-2007 at 04:05 AM.
 
Old 12-24-2007, 09:00 PM   #2
Uncle_Theodore
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I think you can start reading here. It's a nice article.

http://www.ibm.com/developerworks/li...rary/l-memmod/
 
Old 12-25-2007, 01:17 AM   #3
Nayaka
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Originally Posted by Uncle_Theodore View Post
I think you can start reading here. It's a nice article.

http://www.ibm.com/developerworks/li...rary/l-memmod/
Thanks for the link.I read the above article few weeks back. Let me rephrase my question clearly:

Now let's assume that kernel is executing some process in user mode which has code,data,stack,bss and heap. (First 3GB for user address space and remaining 1GB for kernel address space on x86). I believe CR3 register is unique across processes. A process can have multiple segement and in a flat addressing model code and data segments can share same set of linear address space, (i.e.,linear addresses from 0 to 3GB....) then how's the paging unit distinguishes the addresses? For example If I am executing an instruction from code segment then all addresses that I get are logical addresses and I will have to go through GDT to get the base virtual address to which I will add an offset to get the linear address. Suppose I want to access some data from the data segment then when I go through GDT, won't I get the same set of linear addresses which I will be feeding to paging unit? (Since both the segements have start and ending addresses as 0x000...to 0xfff...or first 3GB)

Am I my getting anything wrong here?

Last edited by Nayaka; 12-25-2007 at 01:18 AM.
 
Old 12-27-2007, 10:51 PM   #4
sundialsvcs
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The key to the puzzle is the selectors. Each type of access can use a different one, and this distinguishes one type of memory-access from another. The CPU is given not only the address but also the selector... making two identical addresses non-ambiguous because the selector is different.

Therefore, the fact that two addresses are the same value does not mean that the two addresses "overlap" one another: the selector-value is not the same.

Address-resolution occurs in two steps as shown in the diagram in the article. CR3 applies to the second stage (paging), but the apparent ambiguity is resolved by the first stage (segments).

Last edited by sundialsvcs; 12-27-2007 at 10:54 PM.
 
  


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