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Old 05-12-2010, 03:46 AM   #1
Mar_kas
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Registered: Feb 2010
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Serial port UART FIFO buffer override


I install multiport serial card with WCH CH352L chipset, it has driver for Linux:
# dmesg|grep ttyS
[ 1.313772] serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
[ 1.313944] serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
[ 1.314574] 00:08: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
[ 1.314866] 00:09: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
[ 1.315268] 0000:00:07.0: ttyS2 at I/O 0xdf00 (irq = 18) is a XScale
[ 1.315502] 0000:00:07.0: ttyS3 at I/O 0xe000 (irq = 18) is a XScale

# setserial -g /dev/ttyS*
/dev/ttyS0, UART: 16550A, Port: 0x03f8, IRQ: 4
/dev/ttyS1, UART: 16550A, Port: 0x02f8, IRQ: 3
/dev/ttyS2, UART: 16550A, Port: 0xdf00, IRQ: 18 - multiport card
/dev/ttyS3, UART: 16550A, Port: 0xe000, IRQ: 18 - multiport card

It read nice. When try to transfer less then 17 byte it looks ok(ttyS1 and ttyS3 connected with null-modem cable):
# echo "1234567890123456" > /dev/ttyS3
# cat /dev/ttyS1
1234567890123456

But when more then 16 byte:
#echo "12345678901234567890" > /dev/ttyS3
# cat /dev/ttyS1
78905678901234567890

#echo "12345678901234567890abcdef" > /dev/ttyS3
# cat /dev/ttyS1
1890abcdef1234567890abcdef

16550A Uart FIFO has 16 byte buffer and it looks like how bytes in fifo buffer rewrite from begin because uart don't have time to send it out.

Can any help me? why it don't work fine?
 
Old 05-13-2010, 01:30 AM   #2
kurwongbah
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Registered: Apr 2010
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I kind of half remember doing this a long long time ago
The internal circular buffer of the UART gets overwritten by the new data.
You should turn on flow control on the receiving UART (if supported, should be!) using setserial with the flow_on parameter.
This will get the receiving UART to tell the sending UART to stop sending bytes if the receiving buffer is almost full and tell it to start sending again if the buffer is read and thus emptied.
If your null modem cable has the RTS and CTS lines cross wired you can go for hardware flow control, otherwise use soft control.

For the receiving side you need a receiving process that reads out the bytes that get put into the receiving buffer.
The 'solution' I came up with, having to use bash of course was something like:
- use the mkfifo command to create a local fifo file: mkfifo /tmp/myff
- run a background process to continiously read from serial and dump to fifo: tail /dev/ttyS1 -f > /tmp/myff &
- echo "1234567890123456" > /dev/ttyS3
- Wait a micro second or two...
- cat /tmp/myff
Not sure if I remembered it all correctly, but you might give it a go!
 
Old 05-13-2010, 01:47 AM   #3
Mar_kas
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Registered: Feb 2010
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Thanks to kurwongbah for answer, I will try this.

But I thought that it happend because interrupt dont have time to send bytes from fifo tx buffer, and it rewrites bytes in TX fifo buffer, and then send error bytes to other serial in rx buffer.
TX Trigger level must be 14 bytes by default(for 16550) and I can't change it with setserial, and looks like that Uart dont generate interrupt when receive 14 bytes from 8k serial buffer.
Myabe I wrong, thanks for answer, will tell you result.
 
  


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