no load balancing for MSI-PCI interrupt controller on SMP linux
I was just parousing /proc/interrupts, and noticed that eth0 is only receiving interrupts on cpu0 of my dual-processor machine. All other devices are load balancing their interrupts properly across the two cpus. Further investigation reveals it using MSI-PCI as an interrupt controller instead of IO-APIC-*. I assume that load balancing is not working or is not supported for MSI-PCI ?
There have been a few posts on the internet about support for processor affinity bitmasks - but it is obviously preferable to have load balancing, in general. More specifically, the best I could hope for is to tax cpu1 instead of cpu0. Which is basically the same thing.
I happen to be talking about a workstation, here - not a high transaction network server, so all of this is moot, in way - but I am still curious to learn!
Last edited by jhwilliams; 09-10-2007 at 03:36 PM.