Hello.
Does anyone know if it is possible to make rules in a Makefile that would work like this:

> make debug module
or
> make module debug

where module can be any module that has a specific rule in the Makefile.

The thing I have is a Makefile with different rules that I compile like this:

> make module

What I would like is to add an option so I can compile whichever module with debug-information just by adding a debug to the make command. The debug-information I know how to do, the problem is how to make the Makefile work...

Anyone knows?

Why not add Make targets like
Then you can simply type

Make commands can accept multiple targets, so your examples would simply make the "debug"
and "module" targets one after the other. You could overwrite that behaviour (eg through an "alias" or
a custom script), but the above solution is probably easier.

Another option would be to use a compiler / make flag.

Please use CODE tags for easier reading.

Well, I kind of settled for your solution also. I asked my professor and he said that what I was asking for was not possible with a Makefile. Not in an easy way anyhow... Thank you for your answer.