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Old 12-07-2008, 03:46 PM   #1
AustinMarton
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Registered: May 2007
Location: New Zealand
Distribution: Fedora at home, Ubuntu 10.04 at work
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Question Device driver for Managed Ethernet Switch IC connected w/ Avalon Bus


Hello everyone!

I am working on writing a network device driver for an Ethernet switch IC, for uClinux (2.6 kernel), running on a Nios2 processor on a Cyclone2 FPGA, connected via an Avalon Bus. Currently, my module compiles and loads fine and I can successfully read and write from the indirectly addressed registers (accessing directly addressed registers 0 and 2, which are address and data respectively). It is registered as a platform device. The device is registered as eth0, and displays the correct information (such as the MAC address I have specified) when I run the ifconfig command. When I attempt to ping anything, it calls my transmit function.

The problem I am having at the moment is I have been unable to send/receive any packets, or receive any interrupts. I see no activity on the Ethernet ports when monitoring them under Wireshark. I think that this may be related to how we are accessing the directly addressed registers and/or the setup of the Avalon bus.


The first point that I would like any comments on is the method I am using to access the directly addressed registers. I have a structure named "procif" which contains an entry for each directly addressed register:
Code:
struct st_procif {
	uint16_t index_reg0;
	uint16_t index_reg1; 
	uint16_t data_reg;
	uint16_t cpu_frame_reg;
	uint16_t cmd_status_reg;
	uint16_t int_reg;
	uint16_t ctl_frame_buf1;
	uint16_t ctl_frame_buf2;
};
Then in my "probe" routine I use the ioremap function to map the first index to the base address of the Avalon Bus
Code:
db->procif = (struct st_procif *) ioremap_nocache(BASE, SIZE);
where:
Code:
#define BASE  0x01002050
#define SIZE  0x0016
Although I am not completely sure what the SIZE should be.

To read/write to the registers I call a function like ioread8 with the argument being the address of the structure entry.
For example, the following code is used in the CPU check, which reads from indirectly addressed register 0xfff, which should always contain the value of 0xDA. This process is successful.
Code:
uint16_t indir_addr = 0xfff;
	uint16_t data;

	  iowrite16(indir_addr, &db->procif->index_reg0);
	mdelay(1);
	data = (uint8_t)ioread8(&db->procif->data_reg);
But whenever I read the interrupt register, it stays at 0x00, even when an interrupt should have occurred. (such as when a packet is sent to the switch for it to receive.)

Any help or ideas will be greatly appreciated.

Thanks,
Austin.

Last edited by AustinMarton; 12-07-2008 at 05:19 PM.
 
  


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device, driver, embedded, nios, switch, uclinux


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